7 August 2017 VHDL resolved function based inner communication bus for FPGA
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Proceedings Volume 10445, Photonics Applications in Astronomy, Communications, Industry, and High Energy Physics Experiments 2017; 104454D (2017) https://doi.org/10.1117/12.2280951
Event: Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2017, 2017, Wilga, Poland
Abstract
This article discusses a method of building an internal, universal and parametric bus. The solution was designed for a variety of FPGA families and popular VHDL compilers. The algorithm of automatic configuration of address space and methods of receiving and sending addressed data are discussed. The basic solution realized in VHDL language in a behavioral form and chosen examples of practical use of the internal bus are presented in detail.
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Krzysztof T. Pozniak, Krzysztof T. Pozniak, } "VHDL resolved function based inner communication bus for FPGA", Proc. SPIE 10445, Photonics Applications in Astronomy, Communications, Industry, and High Energy Physics Experiments 2017, 104454D (7 August 2017); doi: 10.1117/12.2280951; https://doi.org/10.1117/12.2280951
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