Commercial Trends in High Rate Data Communications
There is considerable interest in the commercial markets to reduce the power consumption associated with data communications over copper interconnect. The availability of high performance ASICs, such as FPGAs, that have 10’s of channels operating at data rates above 10 Gbps have created a trend to place optical transceivers near the ASIC. The objective is to minimize the signal loss and power consumption associated with driving high speed signals across copper traces. The traditional PCB layout places the optical transceivers near the edge of the PCB, far away from the centrally located ASICs. In this situation, a more than 50% of power consumed in both the ASIC and transceiver is dedicated to driving high speed signals across the PCB. Optical interconnect also allows an increase in channel density without the EMI related crosstalk penalties.
This solution requires a unique packaging approach, as compared to traditional fiber optic modules. Several companies are developing advanced packaging to make embedded transceivers possible [1,2]. Figure 1 shows an example of development by an IBM-Avago team. This effort created compact 1 × 12 transmitter and receiver components (called microPODs™), with each channel operating at 10 Gbps. These compact components were designed to be mounted directly within a server ASIC package. The package (shown on the right in Figure 1) contains 56 microPODs™ to supply 6.72 Tbps of bandwidth to the ASIC. Other companies are also focusing on this integration approach , including a demonstration of 12 mW per Gbps implementation of the entire receiver/transmitter channel (including SERDES) operating at 10 Gbps .
Compact Components for Harsh Environment Optical Communications
For space platforms to take advantage of the SWaP/Cost advantages of embedded photonics, a new paradigm of optical component packaging is required. Figure 2 shows the CORE components designed for embedded applications. A CORE contains the transceiver ASIC, optoelectronic devices (1 × 4 VCSEL and PIN arrays) and collimating optics. The CORE has an 8 × 8 mm2 footprint and 2 mm height. The CORE has a wire-bond electrical interface and expanded beam optical interface (EBOI).
This component can be embedded within a traditional module or placed directly on a PCB (see Figure 3). USConec has developed a ribbon terminus for optical coupling to components with EBOI. The EBOI offers tolerance to misalignment (up to +/- 40 microns for 250 pitch optics).
The CORE is designed for harsh environment applications. Figure 4 shows the CORE stack-up of flip-chip assembled materials (ceramic, GaAs, sapphire and glass). These components are CTE matching (within 5 ppm/C) and are fabricated on wafer scale processes. The CORE has completed 500 thermal cycles (-55 to 125C), further qualification is underway.
Optical Transceivers in Semiconductor Packaging
One of the final hurdles for the adoption of fiber optic interconnect in space and avionic platforms is the need for fiber optic components to look and act like other semiconductor components during the assembly operations. Ultra Communications has patented the inclusion of transceivers in semiconductor Quad-Flatpack-Leadless (QFN) packaging (figure 5). Combining this with the newly developed Ruggedized Vertical Connector (RVCON) (figure 6) allows the transceivers to be reflow soldered during manufacturing and also utilize pick & place technology for board assembly. Previous to this, transceivers were hand soldered and usually had to be placed at the end of the printed circuit board taking up valuable board space with “keep out” regions for the fiber connection. These new developments allow for transceiver placement anywhere on the board and the RVCON does not require “keep out” regions for fiber placement. This also allows for placement of the transceiver next to the high speed ASICs or FPGAs which will be critical at data rates of 10Gbps and above.
In summary, VCSEL-based transceivers can be fabricated as compact embeddable components. VCSELs are commercially available with 25 Gbps data rates per channel and are the lowest power optical components available (due to low lasing thresholds, high optical conversion efficiency and uncooled operation). The CORE construction coupled with the QFN package and RVCON connector lend themselves well to higher and higher data rates and offer further enhancements such as integrated fiber fault detection using OTDR, included non-volatile memory for closed loop laser control over temperature extremes and inclusion of microcontroller for stand alone operation.
The CORE was developed under an AFRL Photonic Manufacturing SBIR program (TPOC - Keith Avery), which created the X20 core now in production
The RVCON was developed under a NAVAIR Removable Fiber Connector SBIR program (TPOC – Brian McDermott) which created a removable connector now in production.
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