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This paper describes heterodyne displacement metrology gauge signal processing methods that achieve satisfactory robustness against low signal strength and spurious signals, and good long-term stability. We have a proven displacement-measuring approach that is useful not only to space-optical projects at JPL, but also to the wider field of distance measurements. |
1.INTRODUCTIONJPL’s dimensional metrology challenges, typified by the efforts of the SIM metrology team [3],[4], TPF [5] and JWST [6] have forced the development of accurate phase measuring electronics to meet their metrology accuracy requirements which are listed in Table 1. Table 1.Metrology needs of various project testbeds and experiments. TPF and SIM testbed metrology experiences will influence flight implementations. JWST’s metrology need is for materials evaluation purposes only and will not be used in flight.
This paper discusses signal processing downstream of the interferometer in Fig. 1, starting with the photodiodes and continuing with preamps and integrated amplification, filtering and sine-to-square wave conversion devices called “post-amps” at JPL. Fig. 1.Context of the electronics discussed in this paper (bold). Heterodyne signals (2 kHz to 1 MHz) from the interferometer’s photodiodes (p.d.) are amplified, filtered and converted to square waves by “post-amps”. The phases of the square waves are measured by a phasemeter [7] and indicate L, the relative displacement of the fiducials in terms of the interferometer’s laser wavelength.  Since the laser wavelength λ is ~0.5 or ~1 micron and the accuracy ε(L) needed is typically of order 10 picometers (pm), the heterodyne phases must be measured to 2ε(L)/λ≈2x10-5 cycles. 2.LESSONS LEARNEDOur experience has shown that ε(ϕ)~ 10-5 cycle accuracy phase measurements require care and attention to detail. Some of the obvious, and a few not- so-obvious lessons learned are summarized below:
Fig. 2.Photodiode and transimpedance amplifier circuit with shielding. Note that the shield is distinct from circuit common.  Fig. 4.Differential driver using one transistor. This circuit [8] has very low heat dissipation, but requires bias at the receiving end of the cable.  Fig. 5.Shielding schemes, with shields shown in dashed lines. JPL experiments are typically in vacuum chambers, which are usually grounded. For low crosstalk and RF pickup, do “a”. Don’t do “b”. In “a”, the post-amp commons are shown disconnected, but if the output connections are not isolated, then the commons will link at the phasemeter. If the outputs are isolated (as in the new JWST/TPF post-amp), then it might be helpful to link the commons and possibly connect them to earth.  It should be noted that paying attention to the above points will also help eliminate “glitches”, sudden integer cycle phase jumps caused by electrical noise (motors, lightning etc.). 3.DRIFT ISSUESLong-term stability of ~10-5 cycles is challenging. The major obstacles are signal-strength variation coupling to phase error, and the thermal stability of the electronics. (It might be noted that common-mode drift of all the channels, as would be caused by laser wavelength drift is not as much of a problem for current applications. We are concerned here with drift of a given channel relative to the others.) 3.1Laser signal strength variation and zero-crossing level.Fig. 6 shows the conversion from sinusoid to square wave. At JPL, the device that performs this function is called a “Post-Amp” and we will use this term. (Postamps also perform signal amplification and conditioning, so the name is reasonable.) Fig. 6.Conversion of sinusoid to square wave. Dashed connections indicate optional hysteresis circuits.  The amplitude of the sine wave input is proportional to the laser power and to the interferometric fringe contrast which, in real-world systems, can be expected to vary a few percent. (This is particularly true for fiber-optic coupled interferometers, where temperature changes affect polarization, affecting the fringe contrast.) Since typical JPL testbeds have heterodyne signal amplitude drift RA=5%, if we want ε(ϕ)≈10-5 cycle stability, the amplitude-to-phase coupling dϕ/dRA must be less than 2x10-4. The phase of the output square wave will not be affected by the input amplitude drift if
Requirements 1 and 2 will be approximately satisfied if low-distortion op-amps [9] are used upstream and are operated at low enough gain and amplitude to be far from their slew-rate and gain-bandwidth limitations. Example: if the op-amp GBWP=10 MHz and FHET=100 kHz, then the G must be < 100, preferably less. Similarly, if the slew-rate R=10V/μs, the gain must be < R/(2πFHET)=16. Evidently, the slew rate limitation is the more constraining. Requirement 3 is problematic since all electronics experience some DC drift with temperature changes. Op-amp output drift can be eliminated by AC coupling, but comparator input offset, which is usually zeroed using an external potentiometer, cannot be eliminated. Quantitatively, a comparator offset voltage will cause a phase sensitivity in units of cycles, and where Vpp is the comparator input amplitude. Example: if Vpp=2 Volts, and we require dϕ/dRA<2x10-5, then Voffset must stay within +/- 0.13 mV. A typical comparator offset temperature coefficient is 0.01 mV/C, so for this example a 13 C range would be acceptable, ignoring all other effects. The reader might suggest that using an automatic gain control (AGC) circuit would eliminate the amplitude variation problems just discussed, however it has proven difficult to construct an AGC circuit that doesn’t introduce its own phase changes. A practical obstacle in evaluating dϕ/dRA is that amplitude modulated sine wave sources that are free of phase modulation at the 10-6 level are not readily available. An approach we have found we can trust is shown in Fig. 7. Its advantage is that by using the same photodiode and electronics as in the final application, parasitic phase shifts are automatically taken into account. Fig. 7.Set up for testing amplitude-to-phase coupling. Signal generator set to FHET drives LED and reference channel post-amp. Neutral density filter moved in/out of gap between LED and p.d., causes a varying amplitude but constant phase signal. The phase meter detects any spurious phase shift by comparing the two post-amp outputs.  3.2Thermal stability of zero-crossing detectorComparator offset drift ε(Voffset) will, by itself introduce a phase drift in cycles. Example: Vpp=2 Volts, then for ε(ϕ)≈10-5 cycles, ε(Voffset) must be less than .063 mV. If the comparator offset temperature coefficient is 0.01 mV/C, then a 6.3 C range would be acceptable, ignoring all other effects. The offset drift problem will be worsened by the addition of a hysteresis feedback resistor (Fig. 6, needed for a glitch-free square-wave output) which will couple comparator output drift (or power supply drift) to the input. This can be solved by using a capacitor instead of a resistor. The capacitor value must be carefully chosen to provide enough feedback to debounce the output, but not so much as to noticeably retard the output phase. In practice, the current solution to the comparator drift problem is to stabilize the temperature, placing the electronics in a constant-temperature oven. 3.3Thermal stability of bandpass filtersAnother source of phase drift is the bandpass filters that are generally needed to remove RF pickup and noise from the photodiode signals. The circuit in Fig. 8 attenuates all frequencies outside of the band ωhp<ωHET<ωlp, where we are working in radians/s, ω≡2πF. There is a phase shift associated with the high-pass and low-pass filters which change the phase by tan-1(ωhp/ωHET) and tan-1(ωHET/ωlp) respectively. ωhp and ωlp are determined by resistance and capacitance values which will drift with temperature. Low drift thin-film resistors are readily available, but even good quality capacitors [10] will drift ~0.01% per degree C. Fig. 8.Bandpass filter that allows through frequencies between ωlp=(RlpClp)-1 > ω > ωhp=(RhpChp,)-1 radians/s. In practice, the buffer separating the low-pass and high-pass sections can be eliminated if Rlp ≪ Rhp, (making it easy to modularise the bandpass filters).  The change in phase per change in capacitance can be predicted: Let u=ωhp/ωHET. A fractional increase in capacitance will cause an equal fraction decrease Δu/u, which will in turn cause a phase shift Example: if FHET=100 kHz, and the high-pass and low-pass frequencies are 50 kHz and 200 kHz respectively, so that for high-pass u=1/2 and for low-pass u=2. A 0.01% change in capacitor values (as expected for a 1 degree C change) will cause a phase shift Δϕ=(0.5)/(1+(0.5)2)(0.0001)=4x10-5 radians =6.4x10-6 cycles. It should be remembered that an equal contribution also comes from the low-pass filter. Indeed, if there are N bandpass filters, the drift will be multiplied by 2N. So for 4 bandpass filters, a 1 degree C change causes Δϕ=5.1x10-5 cycles. Doubling the frequency range to 25 to 400 kHz would reduce Δϕ to 3x10-5 cycles. 4.GLITCHESBecause of the small photodiode currents (typically <1 μA, for ~2 μW impinging on the p.d.) the total gain from the front-end to the zero-crossing detector must be high (a few x 106 V/A in the bandpass frequencies). This large gain increases system susceptibility to technical noise: electric motors, radio stations etc. (Photodetector shot noise is also present, but is not an issue at these power levels.) Technical noise tends to be impulsive, and it is very difficult to prevent it from causing unwanted zero- crossings which are seen as jumps (glitches) in phase of an integer number of cycles, which in turn cause problems for system control loops and complicate data analysis. The cure for glitches is
In our experience, narrowing the bandpass filters, and/or adding more filter stages does not help much. If cures 1 and 2 don’t do the job, then phase-locked-loops can be used. 4.1Glitch removal with phase-locked-loopsThe addition of a phase-locked loop (PLL) [11] is a potent cure for glitches. Conceptually, the PLL is variable, voltage controlled frequency oscillator (VCO) with a mechanism that makes it closely follow the frequency and phase of the square wave from the zero crossing detector. In principle, the phase of the PLL output oscillator is equal to the zero-crossing phase plus a constant offset, usually 90 degrees. Input glitches are ignored by the PLL oscillator, which supplies a clean square wave to the phasemeter. In practice, the phase relationship between the PLL input and output drifts with temperature. For the 74HC4046 we see roughly 2.5x10-4 cycles/C sensitivity. Further work should greatly improve this aspect of the circuit. An additional benefit of the PLL technique is that it allows glitch-free measurement of low S/N signals, allowing much lower laser power. We are taking advantage of this in the JWST dilatometer where low sample heating, low incident power, are required. 5.CYCLIC ERROR, CROSSTALKAs previously mentioned, cross-talk between channels will cause a cyclic non-linearity in the measured phase. The approximate rms magnitude of this error is predicted [12] by the expression in cycles, where Vl is the amplitude of the leakage signal at the zero-crossing detector input and Vpp is the amplitude of the “good” signal. A spectrum analyser may used to measure the ratio Vl/Vpp where it will be typically expressed in dB. RdB = -20log10(Vl/Vpp). Example: a spectrum analyser monitoring the zero-crossing detector input shows that a “good” signal strength of 13 dBm and a leakage signal from the adjacent channel of -47 dBm. The 60 dB difference indicates that Vl/Vpp is 10-3, hence the rms cyclic error will be about 10-4 cycles. This level of leakage is typical of systems where ground loops, cabling, shielding and power supply distribution were not taken into consideration. Applying the “lessons learned” will help get the 80 dB inter-channel isolation needed for 10-5 cycle accuracy. 6.NEW POST-AMP DESIGNA new signal-processing module (Figs 10, 11) incorporating all the “lessons learned” has been built and is in use by the JWST dilatometer and TPF nulling testbeds. Features of the post-amp include:
Fig. 9.Insertion of a PLL between the zero crossing detector and the phasemeter input, to remove glitches.  7.POST-AMP RESULTSThe performance of the JWST/TPF post-amps is illustrated in Fig. 12, and summarized in Table 2. Fig. 12.Drift of JWST/TPF post-amps over forty-eight hours. Each point is 15 minutes of data, averaged.  Table 2.Performance of JWST/TF post-amps.
To obtain the forty-eight stability plot, an Agilent 34401A signal generator, whose internal clock was locked to the phasemeter’s reference clock, fed 20 mV rms, 16 kHz sinusoids to four post-amps. To reduce the effect of digitization noise from the phasemeter, a small amount of noise was added to the sinusoids, enough to cause several LSB of phase noise at the phasemeter inputs. The phasemeters were operated with 0.1 C temperature regulation and with the glitch removing phase-locked loops on. The worst performance is in channel 3, which exhibits an rms drift of 2.2x10-5 cycles. For the JWST dilatometer which uses a 532 nm laser, this translates to 5.9 pm rms. To summarize, we have gained the ability to predictably achieve ~10-5 cycle linearity and repeatability phase measurements of 2 kHz to 200 kHz heterodyne signals. This capability is enabling development of metrology needed by the JWST, TPF and SIM missions. 8.ACKNOWLEDGEMENTSThe authors wish to acknowledge the hard work of Raymond Savedra who implemented many of the circuits discussed here and of Dorian Valenzuela and Guadalupe Sanchez who fabricated the new post-amps. This research was carried out at the Jet Propulsion Laboratory, California Institute of Technology, under a contract with the National Aeronautics and Space Administration. 9.9.REFERENCES, SIM, Taking the Measure of the Universe, 3
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