Furthermore, splitting the detection electronics functions into several units (at least one for the focal plane and proximity electronics, and one for the video processing functions) does not optimise the production costs : specific development efforts must be performed on critical analogue electronics at each equipment level and operations of assembly, integration and tests are duplicated at equipment and subsystem levels.
Alcatel Space Industries has proposed to CNES a new concept of highly integrated detection electronics (SEDHI), and is developing for CNES a breadboard which will allow to confirm its potentialities.
This paper presents the trade-off study which have been performed before selection of this new concept and summarises the main advantages and drawbacks of each possible architecture. The electrical, mechanical and thermal aspects of the SEDHI concept are described, including the basic technologies : ASIC for phase shift of detector clocks, ASIC for video processing, hybrids, microchip module... The adaptability to a large amount of missions and optical instruments is also discussed.
In the framework of studies relative to future earth observation optical systems, Alcatel Space Industries has proposed to CNES a new concept of highly integrated detection electronics (SEDHI). Existing competencies in Alcatel Space, centres of Cannes, Valence and Toulouse cover all the technical items required for this new generation detection electronics.
This architecture may be summarised by the following characteristics:
- video processing entirely integrated on the focal plane
- high speed digital link
- digital processing in dedicated units in the satellite.
The following paragraphs describe the concept selection which leaded to SEDHI and give a technical description of the concept, focusing on modularity and adaptability to a large scale of missions.
– CONCEPT SELECTION
Future earth observation optical systems will be more and more demanding in terms of ground sampling distance, swath width, number of spectral bands, duty cycle.
Existing architectures of focal planes and video processing electronics are hardly compatible with these new requirements: electronic functions are split in several units, and video processing is limited to frequencies around 5 MHz in order to fulfil the radiometric requirements expected for high performance image quality systems.
Architecture described on figure 1 is very close to existing detection electronics, and could include the merging of video and digital processing in the same unit. They may be characterised by the limitation of the functions in the focal plane proximity electronics.
Architectures of figure 2 correspond to video chains which are partly included in the focal plane proximity electronics, ADCs remaining in the Video Processing Unit. In this case the CDS (Correlated Double Sampling) and the associated phase trimming functions are embedded in the proximity electronic units, which allow to reduce by factor 2 the video signal bandwidth and to limit the size and power consumption in the proximity electronics. The interface between the proximity electronics and the video processing remain analogue and thus requires one cable for each video chain.
In architectures described in figure 3, the complete video processing is included in the proximity electronics. The interface with digital processing units is constituted by a limited number of high speed digital links.
The selection process has been performed taking into account the following criteria:
- interface budgets: mass, dimensions, power consumption
- radiometric performances: noise, gain and offset stability, linearity
- adaptability to a large scale of missions: modularity, redundancy
- testability at equipment and system level.
Each architecture has been evaluated, and the trade off concluded to the optimisation of the SEDHI architecture with respect to these criteria.
It may be underlined that this highly integrated concept optimises instrument radiometric performances and interface budgets (mass, volume, power consumption), and will allow to take into account the new generation requirements of increasing frequencies, number of video chains, large dimensions focal planes with multiple spectral bands.
Compared to a “classical” architecture (split in at least two units, one detection unit including the proximity electronics and one video processing unit including the other functions up to digital conversion), this integrated architecture limits the engineering development efforts for the analogue and video processing electronics. The assembly integration and test operations will also be simplified by the limitation of electronic units.
Thus, the SEDHI concept may be resumed by : radiometric performance optimisation at lowest costs.
This architecture is described with more details in the following paragraph.
DESCRIPTION OF THE SEDHI CONCEPT
- Detection electronics
– Electrical architecture :
The SEDHI concept requires to implement on a single board all electronic functions associated to 1 or 2 detectors, from the video signal pre-amplification to the digitised video frame, and including various functions such as video signal processing, detector low noise supply and polarisation generation, detector and video processing chain sequencer, detector clock drivers, synchronisation interface, TM/TC interfaces, …
The functional organisation of this board, named MVP (Module Video de Proximité), is shown on the next figure.
A full detection electronic is constituted of several MVPs, depending on number of detector in the focal plane, and a MSP board (Module de Servitude de Proximité), in charge of MVP synchronisation and MVPs’ interfaces with power supply and TM/TC equipments.
Stacked MVPs and MSP constitute de detection electronic box. This box is mounted very close to the focal plane. Detectors are connected to detection electronics by the mean of short flexible printed circuits.
One MVP is able to process up to 10 CCD outputs, at a maximum pixel rate of 10 megapixel per second. Furthermore, due to high pixel frequency, detector and video processing chain clocks must be phased with an accuracy of a few nanoseconds. For this purpose, MVPs include several programmable phase trimmers in CCD phase driver blocks in association with video processing chains.
Each CCD output is processed by a video processing chain whose main characteristics are: pixel frequency from 1 to 10 MHz, correlated double sampling, 12 bit A/D conversion, digitally programmable phase of sampling clocks on a 100 ns range with 1 ns resolution, black level compensation.
Each CCD clock is driven by a CCD phase driver whose main characteristics are : capability to drive up to 1.5 nF input, with 5 ns rise or fall time, digitally programmable rise and fall time, from 5 to 110 ns, independently digitally programmable delay on a 100 ns range with 1 ns step, adjustable low and high output level
The high output data rate of a MVP (up to 1.2 Gigabit/sec) is transmitted downstream through few LNTHD (Liaison Numérique Très Haut Débit), which are serial or serial/parallel integrated digital interfaces.
It must be noticed that there is a high level of modularity and standardisation at the MVP level because one MVP is associated to one type of detector. With SEDHI architecture, the same MVP can be used each time the corresponding type of detector is used.
Technological implementation :
Future High Resolution instruments require rather large quantities of few basic functions such as video processing chains, CCD phase drivers or LNTHD. For example, quantities are respectively estimated to 70, 180 and 15, in the case of one Pleiades camera.
Consequently, feasibility of these future HR instruments will depend strongly on the availability of those basic functions with good power and size budgets.
Unfortunately, standard component from manufacturers have scarcely the right characteristics, in term of functionalities, performances or capability to withstand space environment.
For video processing, CCD phase driving and digitally programmable delay no satisfactory standard component has been found. For this reason, CNES and Alcatel Space have chosen to develop 3 analogue/mixed ASICs corresponding to these 3 functions. The main characteristics of these 3 functions are listed hereafter.
Digitally programmable delay, delay on rising edge and falling edge independent, 4 channels, delay range from 0 to 100 ns with 1 ns step, CMOS technology, prototyped by CNES.
Video processing ASIC (CLBNG)
Simple or double correlated sampling, 1 to10 megapixel/s capability, two channels multiplexing, fully differential, internal reference, complementary BiCMOS technology, Alcatel Space development.
CCD phase driving ASIC (FAST)
Up to 1.5 nF driving capability with 5 ns rising or falling edges, digitally programmable rise and fall time from 5 to 110 ns, independently adjustable low and high output level, 2 channels, complementary BiCMOS technology, Alcatel Space development.
On the basis of these ASICs, two types of hybrids are developed :
• Video processing hybrid, which includes two complete video processing chains. Each processing chain is based on a CLBNG ASIC, an ARC ASIC, a 12 bit 10 MSPS A/D converter from the commercial market, a digital ASIC for offset correction processing and few passive components. Compared to video processing chain of SPOT5/HELIOS2 generation, these new chains exhibit a gain of two for the maximum pixel frequency and a gain of five for power and size
• CCD phase driver hybrid (HTDN), which is able to drive 4 CCD phases, and based on 2 FASTs, an ARC and few passive components
Up to that step, these technological basic functions, ASIC or hybrids, are compatible with most detection electronic architectures, as described above. In that prospect, they can be considered as standard basic functions.
Due to their low power and size budgets, these basic functions fulfil the requirements of limiting the mass, volume and power consumption of the complete subsystem which is one of the main goals of the SEDHI concept.
Technological implementation of next generation detection electronics is summarised on the next figure.
The preliminary drawing of a MVP based on the described electrical and technological definition is shown hereafter :
- Mechanical concept
The mechanical and thermal architecture is split in three distinguish parts corresponding to separate hardware modules: the focal plane, the electronics modules, the focal plane radiator.
Each element is supported independently by the telescope’s structure with the help of mechanical frames and supporting blades.
Several configurations of focal plane may be considered depending on the application, but the most standard will use linear detectors with a beam splitter in order to compensate the distance between staggered modules.
A focal plane structure holds the detectors and beam splitter mirrors and insures the thermal conductivity between the detectors and the external thermal drain. The thermal flux dissipated by the detectors are dissipated in space through the focal plane space radiator.
Each electronics PCB is mounted in an individual mechanical frame to constitute a MVP. These modules are stacked together and screwed on a specific mechanical frame.
This architecture authorizes a very flexible mechanical architecture, which can be easily adapted to a wide range of focal plane requirements (number of detectors, length of the focal plane..), with a minimization of engineering efforts.
The following figure shows a focal plane constituted of 2 lines of 5 linear detector, with the associated MVP and focal plane radiator.
The thermal concept must handle the heat generated by the detectors in the focal plane and by the MVPs.
The focal plane radiator size depends directly on the detectors power dissipation which is directly related to their operating frequency. The radiator sketched on next figure must handle a detector power dissipation close to 20 W. The focal plane structure is thermally coupled to the radiator by cooper wires and/or heat pipes. The radiator is fixed on the telescope structure by insulation GFRP blades.
The MVP are thermally regulated by the radiate surface opposite to the MVP mechanical interface. The available surface is sufficient to limit the temperature of each module to a temperature compatible with the radiometric requirements. No thermal drain is required as the heat is conducted through the mechanical structure of each MVP.
Adaptability to a large scale of missions
The concept of SEDHI can be advantageously used for instrument with lower number of detectors. This may occur in applications using long linear arrays with very small pixel pitches. In this case the number of detectors butted in the focal plane is smaller.
The following figure shows a configuration with two detectors (a panchromatic and a multispectral detector for instance, which is a configuration commonly identified in the current missions), showing the good adaptability and versatility of the SEDHI concept.
SEDHI may also be envisaged on instruments with a larger number of detector lines or with very large focal plane sizes (larger than 50 centimeters), or with more than 2 detector lines.
Increasing the number of detector lines may be justified if some redundancy is required at detector level. The high integration of electronic functions in the SEDHI concept increase the reliability performances of each detection chain.
The modularity of the concept facilitates the redundancy at detector level or at electronic functions level. It is not foreseen to implement redundancy inside each MVP, but at MSP level where the power supply interface functions, command and control function may be duplicated if required by a specific application.
The distance between detector lines in the focal plane may also be a critical point with regard to the ground processing which will be required to register the images acquired from each line of detectors. Some applications will need to reduce the distance between these lines. This can be performed with the help of beam splitters or by integrating detector dies on a focal plane mechanical interface. In each case, the focal plane will be very integrated and the concept must be compatible with the small size and volumes available for the electronics. Integrating the complete proximity electronics on one PCB (the MVP) allow to reduce the width of electronic modules and thus will ease the reduction of the distance between detector dies.
The following figures shows a SEDHI with 3 lines of detectors (2 redunded panchromatic lines and one multispectral line), with a physical distance between detector lines smaller than 30 mm, and the complete subsystem mounted on a Cassegrain telescope.
Alcatel Space has proposed to CNES a new concept of highly integrated detection electronics: SEDHI.
The main advantages of this concept are the compatibility with the requirements of new generation of earth observation optical systems (large swath width, reduced ground sampling distance, number of spectral bands,…), the modularity, the compatibility with a large scale of missions, and the optimisation of the engineering and manufacturing efforts during the development of an optical payload.
This “photon in – bit out” concept may be resumed by: radiometric performance optimisation at lowest costs.
Alcatel Space is developing for CNES a breadboard which will allow to confirm the SEDHI potentialities at the end of 2001.