This paper presents the current state of the art in CMOS Active Pixel Sensors (APS) for space applications at Fillfactory and also highlights some commercial and industrial development that can be of interest for the space community.
Toulouse Labège, France
5–7 December 2000
Edited by George Otrio
Until recently it was suggested that CMOS image sensors, while not quite as performing as CCDs, were amenable to use in several low to medium end space imaging applications. Typically applications that could benefit from CMOS’s inherent qualities/potential of system-on-a-chip-integration and simpler and/or lower power requirements. Such applications are:
• Low-grade earth and planetary imaging
• Lander and rover near imaging
• Robotics (requires high frame rates and windows for the simultaneous tracking of several objects)
• Visual telemetry
• Spacecraft optical guidance and navigation (requires low noise, high sensitivity, and high readout rates).
At that time it was suggested that high quality scientific imaging had to be excluded from potential applications due to the performance lack of CMOS optical sensors in terms of noise, non-uniformity and dark signal levels. Recent developments indicate that this was a pessimistic view. Today CMOS imaging performs better, and gets into domains were CCDs are not even feasible.
In a first part this paper reports on the current developments of image sensors for space-borne applications at Fillfactory, the second part shows some standard designs that are now dedicated to a specific industrial or other professional application but having the potential to spin off to future missions or experiments.
At Fillfactory the two main application areas for CMOS image sensors in space-related projects are: Attitude and Orbit Control Systems (AOCS) and visual telemetry. Current projects all build further on the radiation-tolerant design technique that was developed in 1999 in IMEC/Fillfactory.
Total dose irradiation tests on standard CMOS APS pixels with enhanced fill factor show a significant loss of functionality after irradiation with γ rays to doses between 50 and 200 Gy (Si) [5-20 krad(Si)], depending on the technology, the layout of the pixel, and the dose rate (Ref.3). An increased reverse current of the silicon photodiodes and an enhanced leakage current of the reset transistor in the active pixel, through its parasitic field transistor, cause this failure. As a consequence, nMOS-based pixels show a large increase in dark current, while the integration of the actual photocurrent on the pixel capacitance is virtually masked by the leakage currents of the transistors (Ref.4).
Alternatively, pMOS pixels do not suffer as obviously from radiation effects as they are not plagued by the parasitic field transistor. Yet, their application in imagers is still less attractive as these pixels have a considerably lower sensitivity than nMOS ones, especially in the near-infrared part of the spectre.
IMEC developed, partly funded by ESA, a new nMOS pixel architecture that preserves the electro-optical sensitivity of the N-type, while adding to it an increased tolerance towards γ-irradiation. This pixel shows only a gradual deterioration up to doses exceeding 20 Mrad, 200kGy(Si). The major drawback of the technique is in its inherently larger pixel size, as indicated in the following table:
The specific design of this pixel avoids leakage of the transistors and leads to a largely decreased dark current growth. The dark current values that are observed in this pixel after more than 200 KGy(Si), are already obtained after less than 200 Gy(Si) in standard pixels.
During the radiation tests on pixel test structures, which lasted for several weeks, the 60Co irradiation (dose rate 350 Gy(Si)/h) was stopped for 562 hours after 33.8 KGy(Si). During this period, significant annealing was observed indicating that dark current degradation might be very low in the low dose rate space environment where long-term annealing may occur.
Present on-going work is the application of the underlying hardening principles to real imagers, containing peripheral circuits such as ADCs and correlated double sampling amplifiers. The technology is used in a forthcoming new generation APS sensor for star tracking and other attitude sensing applications. A version of the technology, stripped-down to allow for a small pitch, is used in the IRIS3 camera-on-a-chip, which will feature a 1024x768 resolution and direct interfacing to SDRAM memory banks for image storage and to an image compression device.
Image sensors for AOCS
The first-generation APS sensors developed at IMEC in the ESA contract Attitude Sensor Concepts for Small Satellites (ASCoSS, Ref.2) led to a technology demonstrator of a miniature star tracker. This breadboard showed an accuracy and a Noise Equivalent Angle both better than 1 arc minute (2σ) per 5mv star in a 20° x20° field of view, at an update rate of 10Hz. The sensor performed with the same signal to noise ratio, for a given optics aperture, as a CCD. The sensor was designed using the standard design techniques resulting in a radiation tolerance up to 20 Krad at low dose rates.
Fillfactory is now developing the next-generation CMOS sensors for star and sun sensing. More specifically a beam- and star tracking sensor with a 512x512 format is being developed in cooperation with IMEC. In the domain of sun sensing Fillfactory takes part in two consortia that aim to design a low cost digital sun sensor; one of these projects will use the 512x512 format sensor that is being developed with IMEC, the other consortium will implement a 1024x1024 sensor. Finally, Fillfactory will build the optical sensors for the visual and near-infrared sub-system of the Fourier Transform Spectrometer (FTS) in the Atmospheric Chemistry Experiment (ACE) of the Canadian Space Agency (CSA).
In the course of these projects a family of image sensors is being developed that all employ the new radiation tolerant design technique. The following table lists the most common specifications and also indicates the differences between the devices.
The 512x512 device was fabricated and is operational now. Its evaluation includes a total dose irradiation up to 230 Krad at a high dose rate. Immediately after irradiation an increase in dark current was observed, however still within expectations. No noticeable increase in power supply current could be measured.
The detailed design of the 1024x1024 device is taking place now, the first devices are expected in April 2001. Meanwhile, the 256 x 256 device is in its preliminary design phase and first samples are expected in June 2001. In the summer of 2001 this device will go through a complete space qualification involving temperature cycling, vibration and shock testing.
In the field of spacecraft visual telemetry, experience has been amassed on three flights, with at least one more flight scheduled for the near future: FUGA15 sensors were demonstrated on Ariane test flight A-502. These are continuous-readout APS imagers, with a logarithmically compressing opto-electric transfer which allows for a huge input dynamic range. As a drawback, this sensor architecture has high noise, and even more importantly, a high static non-uniformity that has to be removed by look-up-table correction even before attempting image processing and data compression. The 512x512 pixel FUGA15 nowadays has a 1024x1024 pixel successor, the FUGA1000.
Normal CCD and APS imagers (ideally) have low noise, low non-uniformity, and a linear transfer function. Such a sensor was tried in-flight on the XMM mission, alongside the logarithmic-response FUGA15, so that direct comparison could be made. The sensor, named IRIS1, was developed at the end of 1997, as part of an ESA contract. Later a color-patterned IRIS1 made a sequence of pictures of the separation of two Cluster satellites.
Two lessons were learned: it is fairly hard, though not impossible, to predict illumination conditions in order to set the correct exposure time on a linear-transfer camera, and secondly, the contrast in a typical space telemetry scene (i.e. black sky, sun, earth, dark spacecraft, reflections off metallic parts, …) demands for more than the 60-70dB dynamic range allowed by CCDs or APSs. The first problem can be tackled by the inclusion of an automatic exposure control system in the camera or on the sensor. The second problem is partly solved by a new type of integrating bi-linear-response sensor.
As a continuation of this development, the new IRIS2 camera-on-a-chip integrates the focal plane of the older IRIS1 640x480 pixel sensor with 15K gates of standard-cell logic, designed for fault-tolerance. The only additional parts required for an operational camera are clock oscillator, passive bias components, power supply conditioning (only 5V needed), and interface drivers/receivers.
Compared to the all-analogue IRIS1 counterpart, the logic circuitry of IRIS2 does cause less than 4dB extra noise in the analogue domain. The following table shows the main specifications for IRIS 2:
|Pixel pitch||14 m|
|SNR||> 62dB (analogue output)|
|Readout||full-frame, windowed, sub sampled, interleaved, digital pixel binning|
|Command interfaces||RS-422, synchronous serial,processor bus|
|Data interfaces||RS-422, synchronous serial,synchronous parallel, analogue|
|System clock||12.0 or 12.5MHz|
Under ESA contract a successor development is on-going: a new single-chip camera will be made, named IRIS3 having the following specifications:
|Format||1024 x 768|
|Pixel pitch||15 m|
|Radiation tolerance||> 50 krad|
|SNR||> 70dB (analogue)|
|Readout||full-frame, windowing, subsampling|
|Additional logic||control for external 64MB SDRAM image storage memory, interface to compression device|
In the recent years Fillfactory has developed different technologies, each targeted to a specificic domain in industrial vision or professional photography. Progress has been made in extension of the dynamic range of linear image sensor, high-resolution photography and high-speed imaging.
This method allows a linear-transfer APS to accept an intra-scene contrast normally exceeding its dynamic range, and this in one single image exposure, i.e. without reverting to combining two or more separate images each made with a different exposure time.
To obtain this the pixel has been modified to collect photo charges at its highest sensitivity up to a certain threshold, after which the pixel’s transfer reverts to the sensitivity commanded by the imager’s electronic shutter. This yields a two-piece transfer curve with a compressing character. The knee in the curve can be set to a fixed position, or alternatively it can be controlled more dynamically with an external digital-to-analogue converter.
In 1999 an APS imager was realized, targeted at true-negative size 35mm digital studio-quality photography (Creo-Scitex Leaf C-MOSTTM camera). This sensor not only had a for CMOS unprecedented resolution of 3000 by 2000 pixels, it also had to overcome the 19 mm x 19mm reticle size limit imposed by the silicon fabrication process.
The latter problem was overcome by using the stitching technology offered by the fab, Tower Semiconductor of Israel. Stitching, a technique inherited from the CCD-world, allows a chip to be built of several mask sets that each individually undergo their own exposure and processing steps. This way a chip larger than the reticle can be built from modules, each smaller than the reticle. To obtain a total die size of over 38 x 27 mm, six modules were used, including one 1k x 1k pixel array block, and upper/lower and side periphery blocks.
During pixel design noise and saturation levels were optimized for the dynamic range demanded by the particular application. shows the sensors specifications.
|Photosensitive area||24x36mm (35mm film negative format)|
|Number of pixels||3150 x 2100|
|Pixel size||11.4μm (.5μm process)|
|Number of analogue outputs||4|
|Electronic shutter||Rolling curtain|
|Noise level||< 40e-|
|Saturation level||> 140000e-|
|Dynamic range||> 70dB|
|Readout speed||250 ms|
The following table To safeguard the sensor’s noise performance no logic or ADC has been included on the chip: external components are to be used. From a systems point of view this is acceptable, as quality cameras tend not to be of minimal dimensions anyway. The power requirements are a standard 5VDC. Operation with elevated supply voltage is possible too, in which case the sensor’s dynamic range increases.
High-speed imaging traditionally has been the domain of photochemical pelicule film cameras, a technology that can attain frame rates in the tens of thousands per second, at the expense of bulky equipment and even more bulky reels of film. The application of standard CCDs in this field is hindered by an imperfect charge transfer, leading to smear, blooming and image lag, especially in over-illuminated parts. The best high speed CCDs today are limited to 1000 frames/sec at a resolution of 512 by 384 pixels (e.g. Kodak EKTAPRO series). The very first generation of dedicated high-speed CMOS APS already exceeds CCD performance: the device presented here performs at 512 x 512 pixels and 1000 frames/second, with its technology still enabling a considerable growth in sensor format and resolution.
The sensor has been designed by FillFactory for US company Vision Research, that commercializes it in their Phantom camera range. The sensor uses a six-transistor active pixel that avoids ghost imaging by means of its immediate conversion of photo charge to voltage. The pixel also implements a true synchronous shutter (i.e. snapshot shutter) that allows exposure times for the whole array to be instantaneous and as low as 10 microseconds. While CCDs implement synchronous shuttering by the interline architecture or the frame transfer architecture, this APS device has an analogue memory element located in each pixel. Sensitivity does not suffer thanks to Fillfactory’s patented near-100%-fillfactor technology. The pixel’s sensitivity, noise, and saturation levels were optimized for the highest possible sensitivity, to allow for the ultra-short exposure times demanded by the application.
The specifications of the high-speed image sensor are summarized in the following table:
|Number of pixels||512 x 512|
|Pixel size||16μm (.5μm process)|
|Number of analogue outputs||16|
|Electronic shutter||Synchronous, true snapshot|
|Dynamic range||> 58dB|
|Readout speed (nominal)||1000 frames/second|
|Readout speed (windowed)||32000 frames/second|
Typical ground-based applications are crash-tests and sports motion analysis. Space applications that could be envisaged are micro-gravity physics experiments (fluid dynamics, …), robotics, and analysis of thruster plumes.
The future looks bright for CMOS image sensors in space applications. Older devices like the FUGA15 and IRIS1 have been used, or are planned to be used, on five missions so far, and a growing interest from the space community indicates acceptance of the technology. Basic research into radiation hardness soon may yield devices performing well up to hundreds of kilorads and beyond, with the actual pixels breaking the megarad barrier.
For industrial applications, sensors have been demonstrated exceeding six megapixels in resolution with a high dynamic range, and others with full frame rates of 1000 images/second. The technologies used in these sensors allow even higher performances. It is to be expected that smaller-feature CMOS processes, i.e. .35μm and beyond, will help in combining such a high performance with radiation-hardness for space use.
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