Cost-effective generation of single-digit nano-lithographic features could be the way by which novel nanoelectronic devices, as single electron transistors combined with sophisticated CMOS integrated circuits, can be obtained. The capabilities of Field-Emission Scanning Probe Lithography (FE-SPL) and reactive ion etching (RIE) at cryogenic temperature open up a route to overcome the fundamental size limitations in nanofabrication. FE-SPL employs Fowler-Nordheim electron emission from the tip of a scanning probe in ambient conditions. The energy of the emitted electrons (<100 eV) is close to the lithographically relevant chemical excitations of the resist, thus strongly reducing proximity effects. The use of active, i.e. self-sensing and self-actuated, cantilevers as probes for FE-SPL leads to several promising performance benefits. These include: (1) Closed-loop lithography including pre-imaging, overlay alignment, exposure, and post-imaging for feature inspection; (2) Sub-5-nm lithographic resolution with sub-nm line edge roughness; (3) High overlay alignment accuracy; (4) Relatively low costs of ownership, since no vacuum is needed, and ease-of-use. Thus, FE-SPL is a promising tool for rapid nanoscale prototyping and fabrication of high resolution nanoimprint lithography templates. To demonstrate its capabilities we applied FE-SPL and RIE to fabricate single electron transistors (SET) targeted to operate at room temperature. Electrical characterization of these SET confirmed that the smallest functional structures had a diameter of only 1.8 nanometers. Devices at single digit nano-dimensions contain only a few dopant atoms and thus, these might be used to store and process quantum information by employing the states of individual atoms.