20 March 2018 Rigorous ILT optimization for advanced patterning and design-process co-optimization
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Abstract
Despite the large difficulties involved in extending 193i multiple patterning and the slow ramp of EUV lithography to full manufacturing readiness, the pace of development for new technology node variations has been accelerating. Multiple new variations of new and existing technology nodes have been introduced for a range of device applications; each variation with at least a few new process integration methods, layout constructs and/or design rules. This had led to a strong increase in the demand for predictive technology tools which can be used to quickly guide important patterning and design co-optimization decisions.

In this paper, we introduce a novel hybrid predictive patterning method combining two patterning technologies which have each individually been widely used for process tuning, mask correction and process-design cooptimization. These technologies are rigorous lithography simulation and inverse lithography technology (ILT). Rigorous lithography simulation has been extensively used for process development/tuning, lithography tool user setup, photoresist hot-spot detection, photoresist-etch interaction analysis, lithography-TCAD interactions/sensitivities, source optimization and basic lithography design rule exploration. ILT has been extensively used in a range of lithographic areas including logic hot-spot fixing, memory layout correction, dense memory cell optimization, assist feature (AF) optimization, source optimization, complex patterning design rules and design-technology co-optimization (DTCO). The combined optimization capability of these two technologies will therefore have a wide range of useful applications. We investigate the benefits of the new functionality for a few of these advanced applications including correction for photoresist top loss and resist scumming hotspots.
© (2018) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Kosta Selinidis, Kosta Selinidis, Bernd Kuechler, Bernd Kuechler, Howard Cai, Howard Cai, Kyle Braam, Kyle Braam, Wolfgang Hoppe, Wolfgang Hoppe, Vitaly Domnenko, Vitaly Domnenko, Amyn Poonawala, Amyn Poonawala, Guangming Xiao, Guangming Xiao, } "Rigorous ILT optimization for advanced patterning and design-process co-optimization", Proc. SPIE 10587, Optical Microlithography XXXI, 105870M (20 March 2018); doi: 10.1117/12.2299375; https://doi.org/10.1117/12.2299375
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