20 March 2018 A portable pattern-based design technology co-optimization flow to reduce optical proximity correction run-time
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Abstract
Along with process improvement and integrated circuit (IC) design complexity increased, failure rate caused by optical getting higher in the semiconductor manufacture. In order to enhance chip quality, optical proximity correction (OPC) plays an indispensable rule in the manufacture industry. However, OPC, includes model creation, correction, simulation and verification, is a bottleneck from design to manufacture due to the multiple iterations and advanced physical behavior description in math. Thus, this paper presented a pattern-based design technology co-optimization (PB-DTCO) flow in cooperation with OPC to find out patterns which will negatively affect the yield and fixed it automatically in advance to reduce the run-time in OPC operation.

PB-DTCO flow can generate plenty of test patterns for model creation and yield gaining, classify candidate patterns systematically and furthermore build up bank includes pairs of match and optimization patterns quickly. Those banks can be used for hotspot fixing, layout optimization and also be referenced for the next technology node. Therefore, the combination of PB-DTCO flow with OPC not only benefits for reducing the time-to-market but also flexible and can be easily adapted to diversity OPC flow.
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Yi-Chieh Chen, Yi-Chieh Chen, Tsung-Han Li, Tsung-Han Li, Hung-Yu Lin, Hung-Yu Lin, Kao-Tun Chen, Kao-Tun Chen, Chun-Sheng Wu, Chun-Sheng Wu, Ya-Chieh Lai, Ya-Chieh Lai, Philippe Hurat, Philippe Hurat, } "A portable pattern-based design technology co-optimization flow to reduce optical proximity correction run-time", Proc. SPIE 10588, Design-Process-Technology Co-optimization for Manufacturability XII, 1058810 (20 March 2018); doi: 10.1117/12.2297077; https://doi.org/10.1117/12.2297077
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