In this paper, we focus on optimizing the line roughness performance by using wafer stress engineering on 30nm pitch line and space pattern. This pattern is generated by a self-aligned quadruple patterning (SAQP) technique for the potential application of fin formation. Our investigation starts by comparing film materials and stress levels in various processing steps and material selection on SAQP integration scheme. From the cross-matrix comparison, we are able to determine the best stack of film selection and stress combination in order to achieve the lowest line roughness performance while obtaining pattern validity after fin etch. This stack is also used to study the step-by-step line roughness performance from SAQP to fin etch. Finally, we will show a successful patterning of 30nm pitch line and space pattern SAQP scheme with 1nm line roughness performance.
ACCESS THE FULL ARTICLE
Eric Liu, Akiteru Ko, Peter Biolsi, Soo Doo Chae, Chia-Yun Hsieh, Munehito Kagaya, Choongman Lee, Tsuyoshi Moriya, Shimpei Tsujikawa, Yusuke Suzuki, Kazuya Okubo, Kiyotaka Imai, "Line roughness improvements on self-aligned quadruple patterning by wafer stress engineering," Proc. SPIE 10589, Advanced Etch Technology for Nanopatterning VII, 105890T (9 April 2018);