Improved digital watermarking method and realization based on FPGA

Ziyu Yang; Xiaodong Hu

doi:10.1117/12.2315053

24 July 2018 Improved digital watermarking method and realization based on FPGA

Ziyu Yang, Xiaodong Hu

Proceedings Volume 10697, Fourth Seminar on Novel Optoelectronic Detection Technology and Application; 106971Q (2018) https://doi.org/10.1117/12.2315053
Event: Fourth Seminar on Novel Optoelectronic Detection Technology and Application, 2017, Nanjing, China

Abstract

This paper presents a new digital watermarking method, which majors improvement method realised based on single-chip FPGA. The procedure includes dividing the input digital image by block, block selection, sorting the pixel values within the blocks. The data is embedded by using new difference and new histogram-modification-strategy. The definition of new difference takes the position of maximum and the second large value pixel into account. Which is help for to the blocks, in which maximum value equal to the second largest. This algorithm can use these pixel blocks to embed data in. The key algorithm is based on the FPGA, using Verilog HDL language and graphical input method to design on the Quartus II 13.0 software platform. And the processed pixel value will be passed to the computer, providing experimental data for analysis and comparative.

Citation Download Citation

Ziyu Yang and Xiaodong Hu "Improved digital watermarking method and realization based on FPGA", Proc. SPIE 10697, Fourth Seminar on Novel Optoelectronic Detection Technology and Application, 106971Q (24 July 2018); https://doi.org/10.1117/12.2315053

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KEYWORDS

Digital watermarking

Field programmable gate arrays

Image processing

Image compression

Digital imaging

Binary data

Distortion

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