Paper
19 July 1989 A Study of Electron Damage Effects During Low Voltage SEM Metrology
Pradeep K. Bhattacharya, Susan K. Jones, Arnold Reisman
Author Affiliations +
Abstract
Critical dimension metrology, the measurement of the dimensions of features on an integrated circuit, is a vital part of device fabrication technology. As the feature size requirements of ULSI devices continue to decrease below the practical limits of optical metrology, scanning electron microscopy (SEM) inspection and measurement will be utilized on a more routine basis during device fabrication. In semiconductor fabrication applications, metrology techniques are typically used for groundrule verification, in-line inspection of critical layers after photoresist development and after etch, pattern definition and sidewall profile of critical patterns, and determination of etch undercut. With the introduction of submicron design rules, the more established techniques of optical metrology I are inadequate and are rapidly being supplanted by metrology performed on the SEM2. The recent availability of SEM tools which can be operated in a low accelerating voltage mode for inspection of uncleaved device wafers without conductive coatings enables implementation of SEM metrology in a manufacturing environment. Much work is being undertaken to understand the parameters involved in measurement accuracy and precision. However, since radiation exposure to devices occurs during SEM metrology, there is also cause for concern that there could be resultant degradation of the electrical properties of the devices. Degradation has been generally related to generation of fixed positive charge, neutral electron traps, and fixed negative charge in the Si02 due to exposure to ionizing radiation.
© (1989) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Pradeep K. Bhattacharya, Susan K. Jones, and Arnold Reisman "A Study of Electron Damage Effects During Low Voltage SEM Metrology", Proc. SPIE 1087, Integrated Circuit Metrology, Inspection, and Process Control III, (19 July 1989); https://doi.org/10.1117/12.953074
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Cited by 5 scholarly publications.
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KEYWORDS
Scanning electron microscopy

Metrology

Inspection

Electron beams

Oxides

Integrated circuits

Process control

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