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26 March 2019 Measuring after etch overlay and characterizing tilt fingerprints in multi-tier 3D-NAND structures
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Abstract
In next generation 3D-NAND devices, accurately determining after-etch overlay for the multi-layer stack is a major challenge. This is especially the case for the multi-tier 3D-NAND structures, where the overlay of the channel holes is an important performance parameter. The most commonly used after-etch metrology suffer both from the high aspect ratio of the channel holes and from the potential presence of large tilts.

Using In-Device Metrology (IDM), we show results of non-destructive overlay measurements on 3D-NAND memory holes. Once the overlay signal has been determined, the remaining asymmetry information in the measurement can be used to characterize tilt phenomena densely through the memory array.

Using hyper-dense in-device measurements show the overlay effects of intra-die stress. A new lithography scanner model is used to correct specifically for such intra-die overlay fingerprints.
© (2019) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hong-Goo Lee, Dong-Young Lee, Jun-Yeob Kim, Sang-Jun Han, Chan-Ha Park, Jaap Karssenberg, Mir Shahrjerdy, Arno van Leest, Nang-Lyeom Oh, Dong-Hak Lee, Aileen Soco, and Tjitte Nooitgedagt "Measuring after etch overlay and characterizing tilt fingerprints in multi-tier 3D-NAND structures", Proc. SPIE 10959, Metrology, Inspection, and Process Control for Microlithography XXXIII, 1095907 (26 March 2019); https://doi.org/10.1117/12.2515299
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