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Two laboratory methods of gold nanoelectrodes fabrication on the top of a silicon substrate were developed in this work. Both uses an electron-beam lithography. First one is based on a positive tone resist, a cold development and a lift-off technique. Second one is based on a negative tone resist and an ion etching. Methods comparison took into account the following results: obtained resolution, edge roughness and conductance between electrodes. As a result we conclude that only electrodes created by the lift-off technique are suitable for creation of a logic element based on a disordered dopant atoms network. The reason is a high conductance of a silicon after the ion etching.
S. A. Dagesyan,S. Yu. Ryzhenkova,D. E. Presnov,I. V. Sapkov,V. R. Gaydamachenko,G. A. Zharik, andA. S. Stepanov
"Fabrication of electrodes for a logic element based on a disordered dopant atoms network", Proc. SPIE 11022, International Conference on Micro- and Nano-Electronics 2018, 110221P (15 March 2019); https://doi.org/10.1117/12.2522487
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S. A. Dagesyan, S. Yu. Ryzhenkova, D. E. Presnov, I. V. Sapkov, V. R. Gaydamachenko, G. A. Zharik, A. S. Stepanov, "Fabrication of electrodes for a logic element based on a disordered dopant atoms network," Proc. SPIE 11022, International Conference on Micro- and Nano-Electronics 2018, 110221P (15 March 2019); https://doi.org/10.1117/12.2522487