Open Access Paper
2 July 2019 Industry training on on-wafer optoelectronic vector network analysis
Author Affiliations +
Proceedings Volume 11143, Fifteenth Conference on Education and Training in Optics and Photonics: ETOP 2019; 111431Z (2019) https://doi.org/10.1117/12.2523481
Event: Fifteenth Conference on Education and Training in Optics and Photonics: ETOP 2019, 2019, Quebec City, Quebec, Canada
Abstract
In today’s fast-paced world, efficient industrial workplace training has economic implications in any technology firm. Employees are required to learn technical skills and acquire proficiency quickly, regardless of the extent of prior experience. In this paper, we outline a methodology to train technical staff, which could include engineers, technicians, and/or operators, on vector network analysis in the context of photonics companies involved in the characterization of optoelectronic devices, particularly photonic integrated circuits. The acquired skills span electronic, microwave, and optical domains, but assume only basic prior electrical knowledge and no microwave or optics background. Focusing on on-wafer S-parameter characterization of optoelectronic components or modules, we first describe training in various laboratory tasks, including instrument calibration, device handling, probing, optical waveguide alignment, and taking measurements. Then, we elaborate on some relevant skills for processing and analyzing measured data. We identify relevant theory where appropriate, in a way suited for industry needs as opposed to academic settings. In this manner, staff learn sufficiently to be able to level their skills swiftly to get the job done. Much of the pedagogical details stem from our own industrial experiences as a photonic wafer manufacturing company, where we have trained team members of various technical backgrounds. The pedagogy can be applied to other technical areas, and it is hoped that the ideas in this paper will be of value to both nascent and established organizations.

1.

INTRODUCTION

In both radio-frequency (RF) and photonics disciplines, the measurement and analysis of scattering parameters (S-parameters) are of great importance in studying device behavior. It behooves industry firms to efficiently educate new staff to quickly develop necessary skills and maintain productivity. However, this nontrivial subject is typically first encountered only at senior undergraduate levels. Although work has been done to improve S-parameter education, these remain largely academic,1,2 requiring coverage of advanced concepts like Smith charts, or include extensive circuit analysis.3 On the other hand, most operators are not college graduates, let alone possess any RF knowledge, and not all engineers have formal RF education.

In the absence of such prior technical exposure, there is a need to train new staff on how to perform S-parameter measurements, which we call vector network analysis, in an efficient manner. This paper seeks to address this by outlining industry training activities for various practical procedures, in the case of on-wafer measurements of optoelectronic devices. While both RF and optics concepts are covered, no prior knowledge in these domains is assumed.

Whereas engineers might be able to self-learn, proper training of operators is vital, as insufficient training can result in wasted production time and other inefficiencies. Furthermore, it has been shown that educating operators with basic technical fundamentals, as opposed tomere procedural instruction, enhances their knowledge and enables them to be less reliant on engineers when troubleshooting becomes necessary.4

Sec. 2 gives a background of the device used as an example in this paper, as well as the measurement set-up. Sec. 3 establishes the general training methodology. Key laboratory tasks and analysis skills are described in Secs. 4 and 5, respectively. Finally, Sec. 6 concludes the paper.

2.

BACKGROUND

We consider an example optoelectronic device-under-test (DUT) shown in Fig. 1. It is a photonic integrated circuit comprising awaveguide and a photodetector. Thewaveguide, whose entry facet is cleaved and anti-reflection coated to maximize coupling, guides external light to the photodetector. The optical signal causes the photodetector to produce a corresponding electronic signal (a photocurrent), which can be probed via the Ground-Signal-Ground (GSG) pads.

Figure 1.

Photonic integrated circuit DUT consisting of waveguide, photodetector, and probe pads.

00052_PSISDG11143_111431Z_page_2_1.jpg

The DUT has a low-pass frequency response, and the objective is to measure its optoelectronic 3-dB bandwidth f3dB, defined as the frequency at which the magnitude response drops by 3dB of its peak value at direct current (DC). To do so, the set-up in Fig. 2 is used. The main instrument is the vector network analyzer (VNA), which measures S21 (among other S-parameters), from which f3dB can be extracted. An optical input is provided by the laser diode. This is modulated by the Mach-Zehnder modulator (MZM), whose modulation signal is supplied by the VNA at Port 1. The modulated optical signal is then divided by a 95:5 splitter. The 5% arm goes to an optical power meter, while the 95% main arm goes to a cleaved or lensed fiber patchcord mounted onto a V-groove on a translation stage. This is butt-coupled to the waveguide input of the DUT, which is also situated on a translation stage. The power meter reading is used to aid in fiber alignment.

Figure 2.

O/E S-parameter measurement set-up.

00052_PSISDG11143_111431Z_page_2_2.jpg

The DUT performs an optical-to-electrical (O/E) signal conversion, which is sensed by the RF probe in contactwith the DUT’s electrical pads. This RF signal is then fed back to the VNA via Port 2. A source meter is used to supply a bias voltage to the DUT, through the VNA’s Port 2.*

Through sufficient training, both engineers and operators are able to perform the required network analyzermeasurements. We note that component sourcing and assembly are outside the training scope; the procedures described in the subsequent sections assume a fully assembled set-up.

3.

METHODOLOGY

In order to enhance the learning process, trainees experience multiple learning modalities.5,6 Applying the VARK model,7 these include:

  • Visual: Trainees observe a trainer demonstrating how to performtasks.

  • Auditory: Trainees listen to the explanations given by trainers.

  • Read/write: Trainees read through operational procedure manuals. They are also encouraged make their own notes for self-reference.

  • Kinesthetic: After the above introductory familiarizations, trainees gain hands-on experience in performing the tasks under supervision.

In all of the various tasks described in the following sections, training is conducted through the overarching process shown in Fig. 3. Any new task is introduced by a trainer (an experienced engineer or technician); trainees observe, listen, and take notes. Thereafter, trainees personally perform the task while under trainer supervision. This may be repeated a number of times for trainees to gain hands-on experience and for the trainer to correct any mistakes iteratively. After nomore mistakes are observed, the trainer lets trainees performthe task without supervision in order to build confidence. Again, this may go through a few repetitions. Once the trainer is satisfied that the trainees can performthe task correctly and independently, the latter are deemed qualified.

Figure 3.

Practical training process.

00052_PSISDG11143_111431Z_page_3_1.jpg

4.

LABORATORY TASKS

This section describes tasks and training that are needed to conduct optoelectronic vector network analysis. Various tactile tasks are first described. Subsequently, the critical tasks of instrument calibration and the actual measurements are explained in detail.

4.1

Tactile Tasks

These tasks relate to general wafer and DUT manipulations. Operators need to perform them on a regular basis and so supervised training is conducted for them. On the other hand, engineers, needing to possess the related skills for ocassional work, learn through self-practice.

4.1.1

DeviceHandling

Being in a wafer manufacturing organization, one the first things that new operators get trained to do is the proper handling of wafers, which can be down to ϕ2 in. More critically, they are trained to manually handle ‘cells’ or ‘bars’ that have been cleaved out fromthe initial wafers. These can have dimensions down to the 100s of μmand thicknesses down to the 100s of nm.

Operators are shown proper wafer and bar handling by an engineer or supervising technician, then typically spend a few days to a week practicing various hands-on manipulations, including picking, placing, transferring, flipping, and rotating. This repetitive practice enables themto develop the familiarity andmuscle memory needed to know

  • What tool to use to pick wafer pieces.

  • Howmuch pressure to apply when holding pieces by tweezer.

  • How tomaintain grip and not drop pieces in transit.

  • Which storage option to use, e.g. photon ring or gel pack, and how to remove or emplace pieces on or in them.

Another key skill is the ability to manipulate and position DUTs on translation stages while using microscopes for visual navigation. Whereas introductions to instrument usage and the availability of objectives of different magnifications are important, users ultimately gain experience in this task through repeated hands-on practice.

4.1.2

RF Probing

As illustrated in Fig. 4, each DUT has electrical pads for probing. Operators are trained on how to maneuver the RF probe safely. This includes probe positioning, probe lowering, and visually recognizing when contact is made.

Figure 4.

DUT in contact with probe and with aligned fiber. Arrows indicate direction of sequentialmeasurements.

00052_PSISDG11143_111431Z_page_4_1.jpg

4.1.3

OpticalWaveguide Alignment

Operators are trained on aligning the fiber to the DUT’s waveguide. They develop a ‘feel’ formoving the fiber along the stage’s three dimensional axes, while maximizing some proportional indicator, be it an optical powermeter reading or a sourcemeter photocurrent reading. They also learn fiber cleaving, and how to recognize when recleaving is needed.

4.2

Instrument Calibration

A fully assembled measurement set-up, as in Fig. 2, includes inline components, cables, and adapters external to the VNA. These influence the responses measured fromthe DUT, in the formof magnitude and phase changes. The basic purpose of calibration is to account for all these sources and subtract their influence from the measurement, so that the calibrated response can be attributed solely to the DUT.

Calibration is always done before measurements and engineers and operators need careful mastery of this crucial step to ensure that data is meaningful. Sec. 4.2.1 explains some theory that engineers will find helpful to understand the origins of special frequency response cases for probe calibration. Whereas operators need not know the theory, they must still be aware of what the response profiles look like. Sec. 4.2.2 then outlines the calibration procedure.

4.2.1

S-Parameter Theory

Vector network analysis involves the measurement of the scattering parameters or S-parameters of linear electrical or optical networks. In the simplest case, a circuit or DUT can be represented by a 1- or 2-port network, as in Fig. 5. Each port is an input (subscript 1) or output (subscript 2) and has a pair of terminals, which interface with the incident (a) and reflected (b) power waves.8

Figure 5.

1-port and 2-port networks.

00052_PSISDG11143_111431Z_page_4_2.jpg

The interactions of these waves can be consolidated into a scattering matrix given by

00052_PSISDG11143_111431Z_page_4_3.jpg

where the S-parameters are the elements of the matrix:

  • 00052_PSISDG11143_111431Z_page_5_1.jpg = Γin is the reflection coefficient at the input port,

  • 00052_PSISDG11143_111431Z_page_5_2.jpg = Gfwd is the forward transmission (gain or loss) coefficient,

  • 00052_PSISDG11143_111431Z_page_5_3.jpg = Grev is the reverse transmission coefficient,

  • 00052_PSISDG11143_111431Z_page_5_4.jpg = Γout is the reflection coefficient at the output port.

As will be evident, 1-port networks deserve further elaboration. Fig. 6 depicts a 1-port network (grey box), represented by a load or termination with impedance Zt, connected to a source (white box). The source, represented by an ideal source in series with an impedance, is assumed to be matched to the characteristic impedance Z0 of the transmission lines connecting it and the network. Frommost RF electronics textbooks,8 it is easy to show that the reflection coefficient, Γ = S11 or S22, is given by

Figure 6.

1-port network with source.

00052_PSISDG11143_111431Z_page_5_5.jpg
00052_PSISDG11143_111431Z_page_5_6.jpg

This is generally a complex quantity, since Zt can include reactances fromcapacitors and/or inductors in the network. We can express Γ in polar form

00052_PSISDG11143_111431Z_page_5_7.jpg

where ρ = |Γ| is the magnitude, ϕ = ∠Γ is the phase, e is Euler’s number (ex ≡ exp x), and 00052_PSISDG11143_111431Z_page_5_8.jpg is the imaginary unit.

During calibration of network analyzers with RF probes, measurements of networks with known special termination cases, namely, open circuit (OPEN), short circuit (SHORT), and matched load (LOAD), are needed. At radio frequencies, the behaviors of these networks are frequency-dependent and deviate from their DC behavior. The OPEN, SHORT, and LOAD cases can be modeled as a capacitance Ct an inductance Lt, and an inductance Lt in series with a resistance Rt, respectively,9 as depicted in the circuit diagrams in Tab. 1. The table also shows the formulae for calculating the impedance Zt of the respective terminations, where frequency f and angular frequency ω are related by ω = 2πf. Examples of frequency responses are also shown. These were obtained via circuit simulation (Sim) using the parameter values of a particular CascadeMicrotech probe. Their shapes can be understood by considering each case:

Table 1.

Frequency responses of 1-port network terminations. The values of Ct and Lt are for a particular I4ʘ-GSG-75 Cascade probe.

  • Open circuit: Modeled as a small capacitance Ct. All power is reflected, so ρ = |Γ| = 1 = 0dB for all f. At DC, Zt = ∞; from Eqs. (2) and (3), Γ = 1 = (1)ej0;∴ ϕ|f=0 = 0°. At high f, Zt = 1/(jωCt) → 0Ω and the termination tends towards a SHORT; 00052_PSISDG11143_111431Z_page_5_9.jpg.

  • Short circuit: Modeled as a small inductance Lt. All power is reflected, so ρ is always 0 dB. At DC, Zt = 0Ω; Γ = –1 = (1) ej180;∴ ϕ|f=0 = 180°. At high f, Zt = jωLt →∞ and the termination tends towards an OPEN; 00052_PSISDG11143_111431Z_page_5_10.jpg.

  • Matched load: Modeled as a small inductance Lt in series with the load Rt = Z0. At DC, all power is absorbed, so ρ = |Γ| = 0 = –∞dB according to Eq. (2); ϕ|f=0 = 0° and at positive frequencies very close to 0Hz, lim 00052_PSISDG11143_111431Z_page_5_11.jpg (hence, the rapid 0° to 90° jump). At high f, the impedance of Lt dominates over Rt and the behavior mimics that of the SHORT (inductor only) termination; 00052_PSISDG11143_111431Z_page_5_12.jpg, 00052_PSISDG11143_111431Z_page_5_13.jpg.

Knowledge of these ideal frequency response profiles is useful for assessing calibration quality.

4.2.2

Calibration Procedure

We refer to the set-up in Fig. 2. Calibration can be understood by systematically considering each ‘component’ in terms of electrical (E) or optical (O) planes and segments. The two VNA ports are the reference E interfaces, denoted as the ‘VNA plane’. Between these, the interface segments can be simplified to be E—E/O—O/E—E. The first E—E segment is the cable connection between Port 1 and point A at theMZM’s RF input. The E/O segment, between points A and C, comprises the optical components of the MZM, splitter, and fiber patch cord. The O/E segment is the DUT itself. Hence, this is specifically an O/E measurement. Finally, the last E—E segment consists of two parts: the ‘probe assembly’ comprising the RF probe and RF cable up to point B, and the RF cable continuing to the VNA’s Port 2. We choose an interface at point B so as not to mechanically disturb the probe during the necessary cablemanipulation in the calibration step. The end result of calibration is that the E—E and E/O segments are canceled out, leaving only the O/E response of the DUT.

Fig. 7 outlines the calibration procedure. A preset is first done to initialize the VNA and remove any previously cached calibrations. We then begin by connecting an AutoCal module between points A and B and performing a 2-port calibration, saving the calibration ‘setup’ file in the process. This effectively cancels out the RF cable effects and shifts the VNA plane to A and B. Without any connection changes, a 1-port calibration is also done at B to obtain a setup file for later use. The subsequent step is to account for the E/O segment. This E—?—O/E—E configuration requires a known O/E response to be used as a reference. Such is obtained by using a vendor-provided O/E calibration module (CalMod), in place of the DUT. The RF connections are made to the MZMinput and O/E CalMod output at A and B, respectively. The splitter’s output fiber is also connected to the O/E CalMod’s optical input, and ameasurement is made to obtain the E/O segment’s response in a Touchstone .s2p file.

Figure 7.

Calibration procedure.

00052_PSISDG11143_111431Z_page_7_1.jpg

Next, the probe assembly needs to be de-embedded.10 In this 1-port calibration, the VNA’s Port 2 is connected via point B to the RF probe. Using the SHORT-OPEN-LOAD (SOL) technique,11 probe measurements of short circuit, open circuit, and matched load standards on an impedance standard substrate (ISS) are done. In an iterative manner, each standard is manually probed, as shown in the calibration structure microscope images in Tab. 1, and measured, until all three are done and a setup file is created. At this stage, it is beneficial to manually re-measure each standard to check the calibration, given the probe’s sensitivity to parasitics and environmental perturbations. Sample measured (Meas) frequency responses of each standard are plotted in Tab. 1 against their simulated counterparts. It is at this juncture that knowledge of the expected responses is important. In the presence of noise and other inaccuracies, engineers and operators are trained to assess a calibration as ‘good’ if these conditions are satisfied:

  • OPEN:|ρ|≤0.5dB; ϕ|f=0 = 0°.

  • SHORT: |ρ|≤0.5dB; ϕ|f=0 = 180°.

  • LOAD:ρ≤20dB; ϕ|f=0 = 90°.

Unless a satisfactory probe calibration is achieved, it is repeated. Afterwards, through the VNA’s softwaremenu, a two-tier calibration9 is done, using the setup files of the probe and the Port 2 AutoCal, to calculate the probe assembly’s influence in a Touchstone file. Finally, the VNA is set to O/E measurement mode, in which the software factors in the VNA plane and E/O calibration files. The probe assembly is de-embedded and the calibration is complete.

At this point, ameasurement of a ‘golden sample’DUT is taken. This sample has a prior referencemeasurement that was taken after a past good calibration. A visual comparison is done between the current and previous measurements (e.g. S21 magnitude) and a judgement is made on their relative similarity to decide if the calibration is indeed valid or should be repeated.

Whereas engineersmay be quicker to internalize the procedure by grasping the logic of the steps, operators can gain familiarity too, albeit bymeans of extended engineer supervision, memory work, and repeated practice. A step-by-step manual, including photographs andmenu selection screenshots, is helpful.

4.3

On-WaferMeasurements

After successfully calibrating the set-up in Fig. 2, DUTmeasurements can proceed. The procedure is charted in Fig. 8. Firstly, theDUT is appropriately positioned on the translation stage within simultaneous contact and alignment ranges of the probe and fiber, respectively. Device handling and microscope navigation skills (Sec. 4.1.1) are needed here. Secondly, the probe is lowered to make contact with the DUT as per Sec. 4.1.2 and Fig. 4, where multiple DUTs in the same bar are to be measured sequentially. Thirdly, the bias voltage Vbias is set on the source meter and enabled. The source meter (in ‘current sense’ mode) also measures the DUT’s generated photocurrent Ip. Upon enabling Vbias, an observed, albeit small, increase in |Ip| suggests good probing; this corresponds to the dark current. Conversely, no change is a telling indicator of inadequate probe contact. Alternatively, the source meter set to ‘voltage sense’ mode would register at compliance (i.e. open circuit) for poor contact.

Figure 8.

Measurement procedure.

00052_PSISDG11143_111431Z_page_8_1.jpg

Next, the laser is enabled. The reading on the powermeter is used to monitor the integrity of the optical connections, while the main stage-mounted fiber arm is aligned to the DUT’s waveguide input (see Sec. 4.1.3 and Fig. 4) by maximizing the |Ip| reading on the source meter. After a good alignment is achieved, a discernible low-pass-filter-like trace should be visible on the VNA’s user interface, if it is continuously sweeping and set to display |S21|.

Finally, sweep averaging is activated on the VNA if required, and the measurement is recorded and saved into a Touchstone file. Users are trained to follow specific filenaming protocols. The process is then repeated for subsequent DUTs until the test lot is completed.

Based on observations and verbal feedback, we found that operators canmaster themeasurement proceduremuch more quickly and confidently than the calibration procedure. This is likely due to a few reasons. Firstly, the measurement procedure is conspicuously shorter and more linear. Secondly, while both procedures include numerous kinesthetic actions, the measurement steps involve manipulations of more ‘real-world’ objects (e.g. probing the DUT or aligning the fibre), as opposed to clicking through the more ‘virtual’ calibration and de-embedding softwaremenus.

5.

ANALYSIS SKILLS

Taking measurement data is only part of the story; the data also needs to be analyzed to discover behaviors and draw conclusions. Pertaining mainly to engineers, these skills assume some existing knowledge of the DUT design and process parameters.

5.1

Scripting

In the wafer design process, numerous wafers for the same device are produced, each with iteratively varying parameters (e.g. stack or component dimensions, layer materials, etc.) to be optimized. This usually results in dozens to hundreds of device measurements and corresponding data files, as statistics are collected. Scripting offers a way to automate repetitive but necessary tasks such as tidying, consolidation, pruning (i.e. outlier or failed device removal), numerical operations, plotting, and producing summary tables.

Engineers who are assigned data analysis duties typically already possess some programming experience. However, they may be inexperienced in coding for the aforementioned tasks. A useful strategy for learners is to acquire existing scripts from experienced colleagues or other projects, which may or may not be related to the project(s) in question, but nevertheless contain code to execute the relevant data processing. In the course of adapting these scripts to suit required purposes, learners develop the important scripting skills.

5.2

Parameter Extraction

Fromraw data, important parameters need to be extracted. In the case of our DUT, f3dB can be obtained from S21 data. Extraction involvesmathematical and numerical processing steps including smoothing, converting complex quantities to magnitude and phase, converting linear quantities to dB, applying polynomial fits, normalization, and finding the f3dB point. Besides f3dB, other parametersmay also be of interest, such as device capacitance and resistance which can be calculated from S22 data.

For the uninitiated, when and howto apply these operations, especially optional ones like polynomial fitting, might seem foreign. Coaching fromexperienced colleagues is therefore imperative.

5.3

Discovering Trends

Once relevant parameters have been extracted, the next step is to compare results from wafers possessing design and/or process differences. For example, the bandwidth can be compared across photodetector sizes. Data visualization is a powerful tool in this regard, and engineers need to be aware of what options exist and when to use them. In the example, comparative box plots are useful to determine the optimumdetector dimensions for a given f3dB requirement. On the other hand, when comparing device capacitances across different wafer process changes, a scatter plot may bemore appriopriate.

Engineers normally learn these skills by self-reading and also observing their experienced colleagues and applying what they observed to their own analyses.

6.

CONCLUSIONS

We have described industry-oriented training on on-wafer vector network analysis, using the example of an optoelectronic detector. We identified a general training methodology, then outlined various laboratory tasks and data analysis skills that operators and engineers should learn and master. The procedures and ideas pertaining to many tasks can be generalized. For example, Sec. 4.2.2 can be adapted to any VNA configuration (not just O/E). Moreover, the analysis skills in Sec. 5 can apply to contexts beyond integrated photonics.

We hope that this paper will be a useful reference to other organizations facing similar needs.

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Notes

[1] The VNA has an internal bias tee which combines RF and DC signals.

[2] Ideally, the V-groove-mounted bare fiber should also be included. However, its loss is assumed to be negligible, so we can consider the patch cord’s FC connector as the E/O plane termination.

[3] Alternatively, a mechanical calibration kit can be used.

© (2019) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Nicholas H. L. Wong, Brian Pile, and Junqiang Zhou "Industry training on on-wafer optoelectronic vector network analysis", Proc. SPIE 11143, Fifteenth Conference on Education and Training in Optics and Photonics: ETOP 2019, 111431Z (2 July 2019); https://doi.org/10.1117/12.2523481
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KEYWORDS
Calibration

Waveguides

Semiconducting wafers

Optoelectronics

Photodetectors

Optoelectronic devices

Photonic integrated circuits

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