Presentation
17 October 2019 Design to silicon flow challenges for silicon photonics (Conference Presentation)
Author Affiliations +
Abstract
Silicon Photonics design layouts require use of curved shapes, since many of the structures built to route light through silicon are designed to curve smoothly to minimize the loss of signal strength. The design-to-silicon flow involves steps like Design Rule Checking (DRC), Optical Proximity Correction (OPC), Mask Rule Checking (MRC), Mask Process Correction (MPC), mask data fracture, mask writing and mask inspection. All of these steps involve software and techniques that have evolved over decades of use for predominately orthogonal design geometries composed of vertical and horizontal edges. In many cases, these tools and process steps will perform poorly or fail if they are used on free form curvilinear layouts – unless changes are made to accommodate the curvilinear designs. In this paper, we describe challenges in various steps of the design-to-silicon flow associated with supporting curvilinear photonics design layouts. We first present two flow alternatives, which we call “manhattanization” and “free form”. The manhattanization flow is where angles or curved layout edges are converted to short vertical and horizontal fragments closely matching the design intent. The advantage of the manhattan approach is that DRC, OPC, MRC and MPC decks designed for use on orthogonal CMOS designs can be used on photonics content that has been manhattanized. We present examples of layouts where the manhattan approach causes problems in several phases of the tapeout flow. We also present an example of a free form tape out flow, with particular focus on the unique challenges faced in correcting for different wafer processing steps in the OPC recipes. We also discuss some of the existing literature offering ideas on how to best manage free form layouts in OPC and mask data preparation. Ultimately, the goal of these data operations is to enable creation of a photomask for use as a master template in the chip production; since these mask writers almost exclusively operate with rectilinear data, the designs must ultimately be Manhattanized. We will explore the benefits, challenges, and drawbacks to manhattanizaiton specifically during mask making as well. The latter portion of the paper presents some of the challenges faced in mask making for free form photonics designs. We discuss the role that MPC plays in photonics mask production, where many features are sufficiently large to make MPC unnecessary, and we look some examples of more advanced photonics designs where MPC may need to play a role. We explain the challenges in trying to define and enforce MRC rules on curvilinear content to ensure mask inspectability and manufacturability. We describe the design and use of a programmed defect inspection test mask designed to formulate some simple MRC rules for free form mask designs. We demonstrate the linkage between curvilinear DRC and MRC, as the techniques and challenges faced in both areas are very similar. We also explore the relationship between the manhattanization and mask operational and performance metrics, such as data volume, write time, image fidelity, and design intent fidelity when going from manhattanized mask shapes to free form mask shapes for photonics layouts.
Conference Presentation
© (2019) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Ian Stobert, Karen Badger, Gek Soon Chua, Mohamed Gheith, Matthew Kinzler, and Adam Smith "Design to silicon flow challenges for silicon photonics (Conference Presentation)", Proc. SPIE 11148, Photomask Technology 2019, 111480S (17 October 2019); https://doi.org/10.1117/12.2539054
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KEYWORDS
Photomasks

Silicon photonics

Photonics

Optical proximity correction

Silicon

Data corrections

Inspection

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