EUV lithography has enabled shrinking feature sizes up until iN7 using the current Ta-based mask absorber. As we explore next generation nodes, iN5 and beyond, the mask three dimensional (M3D) effects will have a significant impact at wafer level due to the mask architecture, and the oblique illumination angles [1-2]. In order to mitigate these effects, we explore the optical performance of two alternative mask absorber candidates; a High-k absorber and an attenuated phase shifting mask absorber (AttPSM) and compare them to the current Ta-based mask absorber. We evaluate and compare the mask absorbers for memory and logic layers by lithographic source-mask optimization (SMO) using Mentor’s pxSMO tool with ASML’s NXE3400B settings. For memory, contact-holes are simulated using dark-field mask whereas the pillars case is simulated with bright field mask to evaluate bright field as a mask option for EUV with alternative mask absorbers. For logic case, we test these absorbers on iN5 self-aligned block (SAB) layer . The self-aligned block layer is also simulated by adding sub-resolution assist features (SRAFs) to predict the insertion point of SRAFs for logic designs and see if new mask absorber material can reduce the need of SRAF insertion. SMO for memory case shows higher common depth of focus (cDOF) and lower edge placement error (EPE) for High-k absorber over the conventional TaBN mask absorber, whereas significant gain in normalized image log slope (NILS) is observed for the AttPSM absorber. The logic case also has better performance in terms of common depth of focus (cDOF), NILS, EPE mask error enhancement factor (MEEF) and process variation band (PV-band). Adding SRAF’s to iN5 SAB improves the PV-band and image shift through focus for all three cases.