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31 January 2020 Enabling low cost QCL by large scale fabrication on CMOS pilot line
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The costs of manufacturing QCL are still a major bottleneck for the adoption of this technology for chemical sensing. The integration of MIR sources on Si substrate based on CMOS technology paves the way for high-volume low-cost fabrication. Furthermore, the use of Si-based fabrication platform open the way to the co-integration of QCL MIR sources with Si-based waveguides, allowing realization optical sensors fully integrated on planar substrate. We report the fabrication of DFB QCL sources operating at 7.4μm on silicon substrate within 200 mm CMOS/MEMS pilot line. To do so, we have developed an appropriate fabrication process flow that fully respects the design and the process rules of a standard CMOS manufacturing line. Moreover, we have developed wafer level electro-optic characterization on prober station. The characterizations done at wafer level on thousands devices have demonstrated average threshold current densities close to between 3 kA/cm2 and 2.5 kA/cm2 with a relative dispersion around 5%. The optical power can reach 1 mW at ambient temperature, 1.5% duty cycle. This fabrication run achieves performance at the state of the art, that are comparable with those of QCL fabricated on InP substrate. With a yield of 98% on the wafer central fields, this work give perspectives to address application fields needing low cost MIR laser sources.
Conference Presentation
© (2020) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
J. G. Coutard, M. Brun, M. Fournier, O. Lartigue, F. Fedeli, G. Maisons, J. M. Fedeli, S. Nicoletti, M. Carras, and L. Duraffourg "Enabling low cost QCL by large scale fabrication on CMOS pilot line", Proc. SPIE 11288, Quantum Sensing and Nano Electronics and Photonics XVII, 1128807 (31 January 2020);


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