Control Of Insulator-Semiconductor Interfaces Of InP And InGaAs For Surface Passivation And Misfet Fabrication

Hideki Hasegawa

doi:10.1117/12.961997

28 November 1989 Control Of Insulator-Semiconductor Interfaces Of InP And InGaAs For Surface Passivation And Misfet Fabrication

Hideki Hasegawa

Author Affiliations +

Proceedings Volume 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices; (1989) https://doi.org/10.1117/12.961997
Event: First International Conference on Indium Phosphide and Related Material for Advanced Electronic and Optical Devices, 1989, Norman, OK, United States

Abstract

The present status of the understanding and control of InP and InGaAs insulator-semiconductor(I-S) interfaces is discussed for surface passivation and and MISFET fabrication. The electrical and microstructural properties of. I-S interfaces are reviewed, and the existing models concerning the origin of interface states are compared. Then, based on the DIGS model by the author's group, control of I-S interface through introduction of two types of interface control layer(ICL) is discussed. One is an anodic native oxide layer, and the other is an MBE-grown ultrathin pseudomorphic Si layer, both combined with a thick photo-CVD insulator. Both 1CLs lead to significant improvements in Nss, channel mobility and drain current stability.

Citation Download Citation

Hideki Hasegawa "Control Of Insulator-Semiconductor Interfaces Of InP And InGaAs For Surface Passivation And Misfet Fabrication", Proc. SPIE 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices, (28 November 1989); https://doi.org/10.1117/12.961997

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