Electron and hole traps in the same p-InP:Zn substrate were studied by DLTS and TSCAP methods prior to and after irradiation. Prior to irradiation, the DLTS measurements at a quiescent reverse bias of 3V, indicated the existence of three hole traps, H1 (Ev + 0.56eV), H2 (Ev+0.22eV), H3 (Ev+0.14eV) and one electron trap, E1(Ec-0.40eV). The DLTS spectra at a quiescent forward bias of 0.2V, revealed only one interfacial trap, Hi (Ev+0.25eV) which was different from the trap H2. From the bias dependence of the DLTS-data on the most prominent hole trap, the depth variation of trap parameters in surface barrier devices was established. After electron irradiation of the Yb/p-InP MIS device, the electron trap was annealed and four hole traps were observed. Trap data were also obtained on Au or Pd/oxide/n-InP bulk or MOCVD-epitaxial layers, and n +/p junctions grown by MOCVD. Trap parameters are very sensitive to surface conditions, type of metal, presence of oxide, type of device and semiconductor growth technique.