Paper
28 November 1989 Evidence Of A Surface Trap By DLTS Measurements On GaInAs Planar PIN Photodiodes
F. Ducroquet, G. Guillot, J. C. Renaud, A. Nouailhat
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Proceedings Volume 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices; (1989) https://doi.org/10.1117/12.962000
Event: First International Conference on Indium Phosphide and Related Material for Advanced Electronic and Optical Devices, 1989, Norman, OK, United States
Abstract
Parameters affecting the photodiode dark leakage current, which is one of the main factors which determines the sensitivity of these devices, have been analysed. A dark current drift phenomenon under fixed reverse bias voltage is sometimes observed in planar PIN GaInAs photodiodes passivated by silicon nitride, and is interpreted as a charge transfer from GaInAs layer to the SiNx film. We have used this surface electrical property evolution with time to show that an electron trap detected from DLTS measurements is mainly localized near the GaInAs surface. This mid-gap trap level is supposed to be induced by the passivation process.
© (1989) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
F. Ducroquet, G. Guillot, J. C. Renaud, and A. Nouailhat "Evidence Of A Surface Trap By DLTS Measurements On GaInAs Planar PIN Photodiodes", Proc. SPIE 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices, (28 November 1989); https://doi.org/10.1117/12.962000
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Cited by 2 scholarly publications.
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