Paper
28 November 1989 Monolithically Integrated Ga0.47 In 0.53 As MISFET Inverters
M. Renaud, P. Boher, J. Schneider, E. Boucherez, Y. Hily, D. Schmitz, H. Jurgensen
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Proceedings Volume 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices; (1989) https://doi.org/10.1117/12.962024
Event: First International Conference on Indium Phosphide and Related Material for Advanced Electronic and Optical Devices, 1989, Norman, OK, United States
Abstract
Discrete n-channel Depletion and Enhancement mode Si3N4/ GaInAs MISFETs as well as monolithically integrated Si3N4/GaInAs MISFET inverters which consist of an enhancement type driver FET and a depletion type load FET will be presented and discussed. Using Multipolar Plasma Enhanced Si3N4, deposition on a "native oxide free" GaInAs surface, the transconductance is 160 mS/mm (L8 = 2μm) in both D- and E-regimes and the drain current drift under operating conditions, which is the major problem of InP and GaInAs MISFETs, is absolutely negligible at low VDS and about 3% after 30 h at VDS = 3 V. Preliminary results, measured on inverters with conventional PECVD Si3N4 exhibit a DC gain of 4.8.
© (1989) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
M. Renaud, P. Boher, J. Schneider, E. Boucherez, Y. Hily, D. Schmitz, and H. Jurgensen "Monolithically Integrated Ga0.47 In 0.53 As MISFET Inverters", Proc. SPIE 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices, (28 November 1989); https://doi.org/10.1117/12.962024
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