Discrete n-channel Depletion and Enhancement mode Si3N4/ GaInAs MISFETs as well as monolithically integrated Si3N4/GaInAs MISFET inverters which consist of an enhancement type driver FET and a depletion type load FET will be presented and discussed. Using Multipolar Plasma Enhanced Si3N4, deposition on a "native oxide free" GaInAs surface, the transconductance is 160 mS/mm (L8 = 2μm) in both D- and E-regimes and the drain current drift under operating conditions, which is the major problem of InP and GaInAs MISFETs, is absolutely negligible at low VDS and about 3% after 30 h at VDS = 3 V. Preliminary results, measured on inverters with conventional PECVD Si3N4 exhibit a DC gain of 4.8.
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