28 November 1989 Silicon-Implanted Thermally-Annealed N-InP Layers For Microwave Power MISFETs
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Proceedings Volume 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices; (1989) https://doi.org/10.1117/12.962046
Event: First International Conference on Indium Phosphide and Related Material for Advanced Electronic and Optical Devices, 1989, Norman, OK, United States
Abstract
This paper presents the electrical characteristics of InP layers produced in semi-insulating (SI) InP by Si implantation and thermal annealing. We also describe the performance of microwave power MISFETs fabricated on implanted/annealed N+N layers. The implanted layers were activated using an operationally-simple proximity anneal technique. The all-implanted power MISFETs were fabricated using a low (<1011 cm-2 eV-1) interface-density gate-oxide (Si02) layer that results in long-term drain current drift of less than 5%. Power output of 250 mW with 6-dB gain and 26% power-added efficiency was obtained at 10 GHz from 1-µm-gatelength MISFETs having 560-μm periphery. Cutoff frequencies of 43 GHz were deduced from S-parameter data measured on these devices.
© (1989) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
S. G. Liu, P. D. Gardner, S. Y. Narayan, J. B. Klatskin, S. D. Colvin, "Silicon-Implanted Thermally-Annealed N-InP Layers For Microwave Power MISFETs", Proc. SPIE 1144, 1st Intl Conf on Indium Phosphide and Related Materials for Advanced Electronic and Optical Devices, (28 November 1989); doi: 10.1117/12.962046; https://doi.org/10.1117/12.962046
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