The increasing need of computing power has generated a renewed interest in truth-table look-up processing. But as the number of input digits increases the size of the resulting truth-table increases so fast that the required number of reference patterns may become unmanageable. Usually residue number system is used to solve this problem. However residue arithmetic processors suffer from several disadvantages. The most significant one is the time delay involved in encoding the inputs to residue representation and decoding the final result to a binary or decimal representation. In this correspondence', we proposed a simple way to reduce the truth-table for addition and multiplication. Instead of producing sum's truth-table, a carry's truth-table is produced. Carries in each bit can be get simultaneously by truth-table look-up technique. To get the final result, a half-adder is required. Each bit of the result is the half-adder of three inputs, one is the carry, the other two are augend and addend respectively. In multiplication, the product is expressed as a composition of addition and square, the result truth-table of square are much smaller than the table directly constructed from product, so the number of reference patterns required is greatly reduced. Comparisons are given between two kinds of tables, directly constructed from addition and multiplication or produced in the way described above. In the experiment, PROM is used as a logical device to implement logical based pattern recognition. Experimental results are also demonstrated.