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21 September 2020 Computational lithography and its role in nanoimprint lithography for semiconductor device manufacturing
Toshiya Asano, Junichi Seki, Yuichiro Oguchi, Naoki Kiyohara, Koshiro Suzuki, Kohei Nagane, Hiromi Hiura, Keita Sakai, Mitsuru Hiura, Osamu Morimoto, Yukio Takabayashi, Takehiko Iwanaga
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Proceedings Volume 11518, Photomask Technology 2020; 115180V (2020) https://doi.org/10.1117/12.2574629
Event: SPIE Photomask Technology + EUV Lithography, 2020, Online Only
Abstract
For nanoimprint lithography, computational technologies are still being developed. In this paper, we introduce a new NIL process simulator which simulates the whole imprinting process, and evaluates the quality of the resulting resist film. To overcome the scale difference of each component of the system, which makes it difficult to calculate the process with conventional fluid structure interaction simulators, our simulator utilizes analytically integrated expressions which reduce the dimensions of the calculation region. Additionally, we report on the critical dimension uniformity of sub-20nm contact holes as a demonstration of pattern robustness and discuss advancements made in defectivity, throughput and overlay.
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Toshiya Asano, Junichi Seki, Yuichiro Oguchi, Naoki Kiyohara, Koshiro Suzuki, Kohei Nagane, Hiromi Hiura, Keita Sakai, Mitsuru Hiura, Osamu Morimoto, Yukio Takabayashi, and Takehiko Iwanaga "Computational lithography and its role in nanoimprint lithography for semiconductor device manufacturing", Proc. SPIE 11518, Photomask Technology 2020, 115180V (21 September 2020); https://doi.org/10.1117/12.2574629
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KEYWORDS
Nanoimprint lithography
Photomasks
Manufacturing
Optical lithography
Stochastic processes
Computational lithography
Photoresist processing
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