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22 February 2021 Applying machine learning methods to accelerate advanced process node yield ramp
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Abstract
With the continuous growth in IC manufacturing complexity, developing new process nodes has become an ever increasing challenge. From the initial process node architectural explorations to initial design rule specifications to early RET development and “risk production” early NPI (New Product Introductions), critical decisions with far reaching performance and yield impact must be made. Applying innovative methods to enable early and broad engineered testing informs better architectural decisions and performance tradeoffs. Methods to identify, root-cause, categorize known yield detractors and to flag unknown potentially new risk patterns enable product yield risk mitigation and continuous learning. Accumulated learning from each step, each stage and each new product drives improved testing vehicles, better process optimization, and enhanced PDKs, all leading to more robust designs and ultimately higher performance and improved yield. In this paper, we describe innovative Machine Learning methods in DFM and DTCO Applications to improve test vehicle engineering, inform process development and accelerate process node yield ramp.
Conference Presentation
© (2021) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Joe Kwan, Fan Jiang, and Le Hong "Applying machine learning methods to accelerate advanced process node yield ramp", Proc. SPIE 11614, Design-Process-Technology Co-optimization XV, 116140T (22 February 2021); https://doi.org/10.1117/12.2584008
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