1 July 1990 Serial array shuffle-exchange architecture for universal permutation of time-slots
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Proceedings Volume 1215, Digital Optical Computing II; (1990) https://doi.org/10.1117/12.18081
Event: OE/LASE '90, 1990, Los Angeles, CA, United States
Abstract
Because of the well-known advantages of fiber transmission, a technologically important and increasing amount of data is transmitted optically, often in time-slot format. In-line optical time-slot interchangers would obviously be of great use in such systems. In a time-multiplexed opticai computer environment, a time-slot interchanger corresponds to a multiprocessor interconnection network in a spatially parallel multiprocessor system. For fundamental physics reasons, 2x2 optical exchange elements are among the easiest optical logic elements to construct. Until now, for a frame of N time-slots, designs have used a planar array of switches like their space analogs and required a few times N of these switches to implement. By taking a new approach, a powerful structure called a serial array architecture has been developed which has demonstrated very high potential for substantial hardware reduction. A time-domain version of the spatial shuffle-exchange network has been implemented in this architecture which has resulted in the time analog of the NxN space switch to be collapsed to O(log2N) switches. The perfect shuffle permutation is the more interesting part of the stage and consumes most of the switches for the interchanger. By recursively shrinking the size of the shuffle train, like in a Benes network, further reduction in switch count has been achieved. The resulting architecture yields such savings in optical switch and related hardware that in-line time-slot interchangers, even in LiNbO, may now be practical.
© (1990) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Srinivasan V. Ramanan, Srinivasan V. Ramanan, Harry F. Jordan, Harry F. Jordan, } "Serial array shuffle-exchange architecture for universal permutation of time-slots", Proc. SPIE 1215, Digital Optical Computing II, (1 July 1990); doi: 10.1117/12.18081; https://doi.org/10.1117/12.18081
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