Real time computer vision applications require extremely high processing speeds which are very challenging for architectures as well as VLSI technologies. In this paper we investigate two different VLSI and architectural approaches to the decision analysis part of a complex low level image segmentation architecture (LISA). The two different technological approaches are full custom application specific integrated circuits (ASIC) and programmable gate arrays. The two different architectures are a modification of a classical statistical classifier and a connectionist approach using a layered feed forward net. We will also briefly mention the feature extraction part of the architecture, which is essential to understand the complete architecture and is realized using both technologies. LISA as a whole is capable of performing real time (20 M pixels/sec) grey level image segmentation based on grey level and textural properties of the objects. The architectures and technologies will be compared in terms of development time, design methodology, and finally experimental results will be shown.