Paper
28 April 2023 Improvement of CD uniformity using a new selective exposure focusing method
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Abstract
This paper presents a study on a new method to create exposure profiles that are optimized for selected die areas where patterning is critical. This new “region of interest leveling (L-ROI)” method caters for trends in the memory market, where intra-die topography with height steps between for instance cell and periphery areas is commonly observed for several 3D-NAND and DRAM device layers. The method takes advantage of the presence of (periphery) die areas where for some device layers patterning is less important than for other, more critical die areas, like the cell area in 3D-NAND. The L-ROI exposure profiles are insensitive to intra-die topography and to variation of the intra-die topography. They result in tighter focus uniformity (FU) in regions of interest, and thus in tighter CDU as well, than conventional exposures at the cost of an accepted performance degradation in other, non-care areas. Results of a study on a VNAND channel hole layer are presented, including focus performance simulation results and CDU measurement results from in-resist verification of L-ROI functionality on an immersion lithography scanner. The latter show a 31.7% CDU improvement with respect to conventional exposure mode.
© (2023) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Seonho Lee, Jaewoong Sohn, Hyosung Lee, Jaehyung Jung, Youngjun Kim, Heehong Lee, HyoungHwa Jin, Harim Oh, Yongchan Kim, Maarten Boogaarts, Nataliya Nishchenko, Jin-Sung Kim, Noh-Kyoung Park, Sang-Jin Kim, Javier Loaiza Rivas, Jens Wustenfeld, Martin de Nivelle, and Valerio Altini "Improvement of CD uniformity using a new selective exposure focusing method", Proc. SPIE 12494, Optical and EUV Nanolithography XXXVI, 124940Y (28 April 2023); https://doi.org/10.1117/12.2657203
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KEYWORDS
Semiconducting wafers

Critical dimension metrology

Sensors

Scanners

High volume manufacturing

Lithography

Device simulation

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