• HgCdTe stoichiometry (Spectral Response cut-off wavelength): The cut-off wavelength of each DC is driven by the detection layer itself. Indeed, via the adjustment of the Cd/Hg ratio in the Mercury Cadmium Telluride layer, the cut-off of the detector can be tuned continuously from SWIR range to VLWIR detection ranges. The requirement would ask here for a material cut-off wavelength higher than the last spectral channel, that is to say the TIR4 channel (from 11.1μm up to 12.1μm). However, dark current contribution is major in LWIR/VLWIR range and has to be taken into account in order to define the optimized distribution of TIRx bands over one single or two MCT monoliths. To allow performance optimisation on all bands and based on LYNRED heritage, two existing and already HgCdTe stoichiometry relying on respectively:

• Dark current density: As previously described above, the proposed concept for LYNRED linear PEGA IRFPA relies on two detection circuits (LWIR and VLWIR). Therefore, this enables to assess with a better level of confidence the expected level of dark current density @60.5K for the two detection circuits. Dark current density characteristic is one of the major contributors to SNR performance (especially for VLWIR spectral range). Next figure illustrates expected dark current densities values vs FPA temperature for LWIR & VLWIR detection circuits:

• Reflectivity and Anti-Reflective coating (Mono-layer AR coating): Following the monolayer approach, the thickness of the ZnS quarter-wavelength anti-reflective coating is optimized to minimize the average reflectivity over all channels. As a baseline, the same AR coating thickness for both LWIR and VLWIR detection circuits has been considered due to the low added-value in terms of reflectivity/transmission performance. The next figure shows the evolution of reflectivity w.r.t. to wavelength for the selected thickness:

• Spectral Detection Efficiency (SDE) & Photo-Response Non Uniformity (PRNU): SDE is defined as the ratio of the amount of collected electrons over the amount of incident photons considering ideal fully sensitive photodiode areas. SDE includes geometrical fill factor and photodiode Quantum Efficiency. The figure hereafter presents typical SDE evolution vs wavelength for the two detection circuits. Besides, the PRNU, considered as the standard deviation of the photoresponse has been estimated below 3% for LWIR DC and below 5% for VLWIR DC.

• Modulation Transfer Function (MTF): The 30μm pitch MTF has been largely studied and is well mastered at LYNRED ([2] & [3]). MTF results obtained with close proposed material cut-off wavelength of LWIR & VLWIR detection circuits are available for 30μm pitch. Typical MTF values at the Nyquist frequency are geometrical MTF limited (0.64). The following figure illustrates typical MTF performance (evaluated from measurements) compared to expected performance on LYNRED linear PEGA DP:

• ROIC architecture & Main characteristics: The pixel array is constituted of 4 bands (named B0 to B3) of 600 x 3 pixels distributed over 12 outputs. The three available ReadOut (RO) lines per band/channel enable the user to perform external TDI (Time Delay Integration) for SNR optimization if necessary. The channel pitch is 4.02mm as mentioned in Figure 9. Each band can be totally deactivated in order to save power dissipation if not used. Besides, buttability constraints related to pushbroom application (See Table 1) are also taken into account. The distance between first active pixel of B3 and edge of ROIC is less than 1mm and electrical pads are implemented only on one side of the ROIC. TIR LD ROIC has been designed with advanced high performances CMOS technology combined with radiation hardening strategy inherited from previous space programs.

• Analog chain: Photodiode biasing is done by a CTIA (Capacitive TransImpedance Amplifier) input stage. Following reset of the selected CTIA integration capacitance, the photodiode current is integrated in this capacitance and converted as a voltage at CTIA output. The conversion gain depends on the integration capacitance chosen by the user. Three different capacitances are available, providing up to 8 (7 operational and one for test purpose) gains values from 3 Me- up to 18 Me-. Currents of any selected photodiode are integrated simultaneously (Snapshot mode). The voltage information (proportional to the current from the selected photodiode among four, See Figure 10) is stored on the integration capacitance and then read through a video amplifier considering a maximum output swing of 2.6V. In addition, an anti-blooming system allows controlling the saturation level of the pixel output.

• Digital Part: The digital block generates the required internal digital signals necessary for integration and readout sequence. The serial programming interface is integrated into this block. The serial link implemented in the ROIC uses a SPI (Serial Peripheral Interface) physical link. Above this physical link, a protocol address data to access a memory mapped register file is implemented. This allows reading and writing the state of the ROIC at byte granularity. The same clock (typical design value of 4 MHz corresponding to a TDI line framerate of around 175μs) is used for Master Clock and SPI in order to avoid any temporal artefacts. The SPI programming is used to set the requested configuration as for example:

• ROIC Performance (Noise and Power Dissipation): Simulations of typical total ROIC readout noise are reported in the figure hereafter.

• HgCdTe stoichiometry (Spectral Response cut-off wavelength): The selected cut-off wavelength corresponds to the standard 2.5μm stoichiometry point for SWIR products at LYNRED. This enables to benefit from the same detection circuit for all bands (VNIR-3, SWIR-1 & SWIR-2). The next figure illustrates typical normalized spectral response of the detection circuit:

• Dark current density: Even if dark current is generally less critical for SIR applications compared to TIR applications, dark current contribution to the global signal can be close to minimum photonic flux. Therefore, a close follow-up of this performance remains necessary for this purpose. Next figure illustrates dark current density typical for LYNRED linear CAPYORK detection circuit:

• Spectral Detection Efficiency (SDE) & Photo-Response Non Uniformity (PRNU): As defined in §3.2.1, the figure hereafter presents typical SDE evolution vs wavelength for LYNRED linear CAPYORK detection circuit. Besides, the PRNU, expressed as the standard deviation of the photoresponse has been estimated below 5%.

• Modulation Transfer Function (MTF): The 15μm pitch MTF has been largely studied and is well mastered at LYNRED. Typical MTF values at the Nyquist frequency are about 0.46 at pixel level. The following figure illustrates typical MTF performance (evaluated from simulation & measurements):

• ROIC architecture & Main characteristics: The pixel array is constituted of 4 bands (named B0 to B3) of 1200 x 1 TDI readout pixel (on chip TDI up to 12 stages) distributed over 4 outputs. The channel pitch is 4.02mm as mentioned in Figure 10). Each band can be totally deactivated in order to save power dissipation if not used. Besides, buttability constraints related to pushbroom application (See Table 1) are also taken into account. The distance between first active pixel of B3 and edge of ROIC is less than 1mm and electrical pads are implemented only on one side of the ROIC. LYNRED linear CAPYORK ROIC has been designed following a similar approach as LYNRED linear PEGA ROIC (same silicon technology and radiation hardening strategy inherited from previous space programs).

• Analog chain: By analogy with LYNRED linear PEGA ROIC, photodiode biasing is done by a CTIA (Capacitive TransImpedance Amplifier) input stage. The conversion gain depends on the integration capacitance chosen by the user. Currents of the 12 photodiodes of each TDI column are integrated simultaneously (Snapshot mode). Two different capacitances are today available, providing up to 4 (3 operational and one for test purpose) gains values from around 150ke- up to 350 ke-. In addition, an anti-blooming system is also available in order to control the saturation level of the pixel output. Contrary to LYNRED linear PEGA ROIC, every photodiode is selected by default and a deselection is possible in order to optimize SNR performance and to reach 100% operability. Deselected photodiode is then connected to a specific reference voltage. After the photodiode selection block, the analog chain is composed of 12 sample & hold (SH) stages, which are responsible to sample and hold voltage information coming from CTIA output stage. Then, the next 12 downstream TDI stages will temporally average the delayed information which will be finally sampled and stored in ping pong capacitors through the column amplifier, until the on chip reconstructed TDI data are readout via the video amplifier (Maximum useful output swing of 2.1V). Thus, one TDI readout pixel per column will be available at the ROIC output based on the information of the 12 photocurrent successively integrated on the 12 CTIA stages from the same TDI column (See Figure 19).

• Digital Part: The digital part has been designed by analogy with LYNRED linear PEGA ROIC and considering specificities (especially photodiode deselection and TDI management). The serial link implemented in the ROIC uses a SPI (Serial Peripheral Interface) physical link. The MCLK frequency (equal to SPI frequency if used) is 5.5 MHz (corresponding to a TDI line framerate of around 240μs). The SPI programming enables to set the requested configuration as for example:

• ROIC Performance (Noise and Power Dissipation): The major contributor to SNR performance for SIR applications is the ROIC readout noise. Indeed, this can be explained by operating point of SIR applications which relies on combination of low level of input fluxes, frame time around 200-300μs and dark current managed by selecting adequate focal plane array temperature. LYNRED linear CAPYORK ROIC typical power dissipation has been simulated around 250mW for 4 activated TDI readout lines. The expected gain with one readout line switch off is around 55mW.