This PDF file contains the front matter associated with SPIE Proceedings Volume 12794, including the Title Page, Copyright information, Table of Contents, and Conference Committee information.

Graphene-based devices have garnered significant attention for their potential in numerous applications, notably in integrated photonics. For graphene devices to be used in real-world systems, it is necessary to demonstrate competitive device performance, repeatability of results, reliability, and a path to large-scale manufacturing with high yield at low cost. In this study, single-layer graphene electro-absorption modulators serve as a pivotal test vehicle to facilitate wafer-scale integration in a 300mm pilot CMOS foundry, harnessing imec silicon photonics platforms along with the 6- inch graphene transfer capabilities of Graphenea. The patterning of graphene is achieved utilizing a hardmask, with tungsten-based contacts being developed via the damascene method to facilitate CMOS-compatible manufacturing. Through an extensive analysis of inline metrology data during process development along with analysis of hundreds of devices on each wafer, the impact of specific processing steps on the performance could be identified and optimized. Subsequent to optimization, a modulation depth of 50 ± 4 dB/mm is exemplified across 400 devices, measured utilizing 5 V peak-to-peak voltage, achieving electro-optical bandwidths up to 15.1 ± 1.8 GHz for 25μm-long devices. The results achieved are comparable to lab-based record-setting graphene devices of similar design and chemical vapor deposition graphene quality. By demonstrating the reproducibility of the results across hundreds of devices, this work resolves the bottleneck of graphene wafer-scale integration. Furthermore, CMOS-compatible processing enables co-integration of graphene-based devices with other photonics and electronics building blocks on the same chip, and for high-volume low-cost manufacturing.

Efficient coupling of light from an optical fiber to silicon waveguides is a challenging task in integrated photonics. Couplers based on adiabatic mode evolution have the advantages of high bandwidth and low loss but are often accompanied by longer device lengths. In this paper, we introduce the concept of adiabaticity map and optimize the coupling between an optical fiber and Si waveguides by selecting routes on the map that minimize unwanted mode coupling. The map clearly indicates areas in mode evolution where supermode coupling is large and identifies optimal routes for efficient mode evolution. Optimized interaction length and widths are obtained from the adiabaticity map. We obtain highly efficient coupling (96%) with large bandwidth (1-dB bandwidth 280 nm) and misalignment tolerance (⪆90 nm lateral misalignment range for 1-dB excess losses) for the TE polarization.

Quantinuum has developed a trapped-ion quantum computer based on the QCCD architecture which exhibits high-delity operations, mid-circuit measurements and full connectivity. This talk will introduce the QCCD architecture and discuss how we can address scaling challenges with integrated photonics for visible light to facilitate large-scale quantum computing.

At the University of Southampton, we have established an educational photonics pathway in which we teach our undergraduate and postgraduate students the fundamentals of silicon photonics. We have designed silicon photonics laboratories, for both simulation and characterization, where our students have opportunities to design their chips and characterize them. Our assessment strategy aims to improve students’ self-assessment and feedback skills. The material we have developed is also being used for training our technicians and PhD students.

Photonic Neural Networks (PNNs) implemented on silicon photonic (SiPho) platforms stand out as a promising candidate to endow neural network hardware, offering the potential for energy efficient and ultra-fast computations through exploiting the unique primitives of light i.e., THz bandwidth, low-power and low-latency. In this paper, we review the state-of-the-art photonic linear processors discuss their challenges and propose solutions for future photonic-assisted machine learning engines. Additionally, we will present experimental results on the recently introduced SiPho 4x4 coherent crossbar (Xbar) architecture, that migrates from existing Singular Value Decomposition (SVD)-based schemes while offering single time-step programming complexity. The Xbar architecture utilizes silicon germanium (SiGe) Electro-Absorption Modulators (EAMs) as its computing cells and Thermo-Optic (TO) Phase Shifters (PS) for providing the sign information at every weight matrix node. Towards experimentally evaluating our Xbar architecture, we performed 10,024 arbitrary linear transformations over the SiPho processor, with the respective fidelity values converging to 100%. Followingly, we focus on the execution of the non-linear part of the NN by demonstrating a programmable analog optoelectronic circuit that can be configured to provide a plethora of non-linear activation functions, including tanh, sigmoid, ReLU and inverted ReLU at 2 GHz update rate. Finally, we provide a holistic overview on optics-informed neural networks towards improving the classification accuracy and performance of optics-specific Deep Learning (DL) computational tasks by leveraging the synergy of optical physics and DL.

Waveguide-Enhanced Raman Spectroscopy (WERS) is a promising method for detecting chemical and biological compounds with high sensitivity and selectivity on a chip-scale platform. Many challenges in terms of waveguide design, packaging developments and data processing must be overcome for that technology to reach industrial applications. In this talk we will present the development of WERS sensors for industrial bioprocess monitoring.

In the burgeoning field of sensing, Photonic Integrated Circuits (PICs) are essential tools for precise, high-speed detection of biological markers and particles. The performance of these biosensors is intricately linked to the losses of PICs, which is largely determined by the configuration of their core and cladding layers. Recognizing this, the present study ventures into the optimization of these layers in Silicon Nitride (Si3N4) PICs, employing an innovative approach using Classification and Regression Trees (CART). The study identifies propagation and bend losses, two critical factors affecting PIC performance, as response variables. In contrast, the physical characteristics of the core and cladding layers are considered as input variables. To ensure the robustness and completeness of the study, an appropriate Design of Experiments (DOE) is implemented, meticulously exploring possible combinations of layer configurations. Following the DOE, the CART algorithm is then applied to this design space, whereas the losses act as response variables. The algorithm functions by partitioning the design space into regions associated with specific layer configurations and iteratively refines these partitions based on their corresponding impact on propagation and bend losses. The end results of this process is the statistical information about the layer stacks which come with significantly low propagation and bend losses, thereby enhancing PIC performance. This improvement in performance directly translates to heightened sensitivity and specificity in biosensors. Further, the application of the CART methodology has demonstrated its potential to streamline the PIC design process, enhancing its robustness, an aspect critical for practical implementation in fabrication environments.