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1 November 1990 Parallel programming for the parallel recirculating pipeline
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Current image analysis and image understanding applications in DoD systems require very high performance image pixel processing in real time. To attain the necessary performance within stringent system size weight and power constraints requires special-purpose parallel processing hardware architectures. At the same time it is desirable to retain as much programmability as possible in order to rapidly adapt the hardware to new applications or evolving system requirements. The Parallel Recirculating Pipeline processor uses techniques adopted from image algebra and mathematical morphology to provide a low-cost low-complexity high-performance architecture that is suitable for silicon implementation and programmable in high-order languages. This paper discusses the programming model for the Parallel Recirculating Pipeline. The model treats two dimensional data arrays as elementary operands. Elementary operators such as addition are performed point by point on these data arrays. A primitive spatial translation operator allows complex operations such as convolution to be constructed by combining " shifted" and non-shifted imtermediate result arrays. This model corresponds closely with the underlying hardware model and permits processor expressions embedded in " host" language source code to be translated in situ. The translation is accomplished by a simple preprocessor and the resulting modified source code can be cross compiled by any existing compiler of the host language.
© (1990) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
William W. Wehner II, King-Hang Chu, and Michael R. Rowlee "Parallel programming for the parallel recirculating pipeline", Proc. SPIE 1350, Image Algebra and Morphological Image Processing, (1 November 1990);

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