1 November 1990 Technology and design of SIPOS films used as field plates for high-voltage planar devices
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Proceedings Volume 1405, 5th Congress of the Brazilian Society of Microelectronics; (1990) https://doi.org/10.1117/12.26298
Event: 5th Congress of the Brazilian Society of Microelectronics, 1990, Sao Paulo, Brazil
Abstract
In order to improve the voltage handling capability of high voltage and power devices, an efficient technique based on the deposition of a semi- resistive layer acting as a field plate is proposed. The complete design of a high voltage planar transistor (1500V) using a SIPOS layer on SiO2 film is extracted from bidimensional numerical simulations. The evolution of breakdown voltage BVcbo versus critical parameters as oxide thickness, field plate length and field plate-stop channel distance is calculated. A good agreement between theoretical and experimental results is obtained. The breakdown voltage achieved by the devices is near 90 of the ideal planar breakdown voltage without any damage for other electrical parameters.
© (1990) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
D. Jaume, G. Charitat, A. Peyre-Lavigne, P. Rossel, "Technology and design of SIPOS films used as field plates for high-voltage planar devices", Proc. SPIE 1405, 5th Congress of the Brazilian Society of Microelectronics, (1 November 1990); doi: 10.1117/12.26298; https://doi.org/10.1117/12.26298
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