1 June 1991 Signal processing LSI system for digital still camera
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Abstract
This paper presents a feature of an image data compression system, and the algorithm employed in a newly developed digital still camera (FUJIX Card Camera DS-H1). DS-H1 is composed of a CCD with 390K pixels, a digital signal processing unit, and image data compression units named DCT and CODER. An IC memory card of 8 Mbit SRAM is used as the recording media. DS-H1 has not only a function of an image data recording, but also a play back for the instantaneous review. A new algorithm is used for controlling a bit rate of a still frame compressed by ADCT (Adaptive Discrete Cosine Transform). The image data control is an important function for digital still camera in order to guarantee the total number of still images stored in an IC memory card. An information distribution of each image data blocks (8*8) is estimated as ACTIVITY. An adequate quantization step ((alpha) ) is calculated using ACTIVITY and parameters named K1, K2. A set of K1 and K2 suitable for the target compression ratio is transferred from CPU to CODER before the compression sequence starts. As a result of our evaluation, it is actually proved that ADCT with the control function is successfully implemented in a small camera body of DS-H1. Picture quality of the played back images is good. K1, K2 and ACTIVITY are important parameters to determine the bit rate control accuracy and the picture quality of compressed/decompressed images. Our simulation results shows that adequate K1, K2 realize a good picture quality and a high control accuracy.
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Mikio Watanabe, Mikio Watanabe, Osamu Saito, Osamu Saito, Satoru Okamoto, Satoru Okamoto, Kenji Ito, Kenji Ito, Kenji Moronaga, Kenji Moronaga, Kenkichi Hayashi, Kenkichi Hayashi, Seiki Nishi, Seiki Nishi, } "Signal processing LSI system for digital still camera", Proc. SPIE 1452, Image Processing Algorithms and Techniques II, (1 June 1991); doi: 10.1117/12.45367; https://doi.org/10.1117/12.45367
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