1 July 1991 X-ray laminography analysis of ultra-fine-pitch solder connections on ultrathin boards
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As the demand increases for smaller, more powerful new products, design engineers are pressed to increase component densities while simultaneously reducing the size of interconnects. Almost every new product contains more solder joints per square inch than the previous one. New quad flatpack and TAB designs as small as 25 micron leads on 50 micron centers are in the prototype stage. Direct 'chip-on-board' (COB) components placed on a grid of solder bumps with a diameter of 75 microns and a grid of 200 microns are routinely being produced. Future plans include designs with a 25 micron diameter on 50 micron centers which are currently in development. Devices consisting of chips stacked upon chips and interconnected with solder or tungsten wires are increasingly included in new designs. Manufacturers have also begun to produce assemblies on very thin circuit boards with components on both sides. Several technologies have been applied in an effort to provide solder paste and post- reflow inspection. X-ray inspection has proven most effective at determining component placement and solder joint integrity. With its ability to pass freely through circuit board materials and extract detailed structural information from hidden and visible solder joints, the x-ray has proven more adept at assembled board inspection than other automated methods such as laser, ultrasonic, thermal and camera-based systems. This paper addresses the inspection and process control of ultra-thin boards with ultra fine pitch interconnects using x-ray laminography. In addition, the advantages and disadvantages of integrating various fine pitch technologies into the circuit board assembly process are reviewed.
© (1991) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
John A. Adams, "X-ray laminography analysis of ultra-fine-pitch solder connections on ultrathin boards", Proc. SPIE 1464, Integrated Circuit Metrology, Inspection, and Process Control V, (1 July 1991); doi: 10.1117/12.44460; https://doi.org/10.1117/12.44460


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