1 September 1991 Optical approaches to overcome present limitations for interconnection and control in parallel electronic architectures
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Abstract
Current limitations for interconnection and control in electronic integrated circuits, from the architectural and technological point of view, are presented. Different kinds of interconnection problems within a chip are briefly presented, according to a specific classification. Then, the authors show how they have incorporated optoelectronic devices using a standard CMOS technology to resolve one interconnection problem: the chip clock distribution and control. Some advantages and limitations of this technique used to sequence and control a 8*8 retina are presented. The authors discuss how these experiments, with other techniques used to output data, can provide a possible approach to an optical bus.
© (1991) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Thierry Maurin, Thierry Maurin, Francis Devos, Francis Devos, } "Optical approaches to overcome present limitations for interconnection and control in parallel electronic architectures", Proc. SPIE 1505, Optics for Computers: Architectures and Technologies, (1 September 1991); doi: 10.1117/12.47020; https://doi.org/10.1117/12.47020
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