Paper
1 February 1992 Physics of overstress-related failures in semiconductor devices
M. K. Radhakrishnan, M. Natarajan
Author Affiliations +
Proceedings Volume 1523, Conference on Physics and Technology of Semiconductor Devices and Integrated Circuits; (1992) https://doi.org/10.1117/12.57002
Event: Conference on Physics and Technology of Semiconductor Devices and Integrated Circuits, 1992, Madras, India
Abstract
The effects of extrinsic factors on the reliability and performance of semiconductor devices are significant, especially when these devices are used for critical applications. The major extrinsic factors affecting the performance of devices are electrical overstress (EOS), electrostatic discharge (ESD) and radiation. The failure modes/mechanisms associated with EOS and ESD vary with technologies, device density as well as the failure location. The commonly observed failure modes are open circuit, short circuit, excessive leakage current, reduction in threshold voltage, snap back breakdown, etc., and the failure mechanisms are metallization melting and spiking due to electrothermomigration and Joule heating, junction fusing by second breakdown, dielectric breakdown, etc. In most cases the failures can be catastrophic, whereas latent failures are also possible due to EOS/ESD. Such latent failures are very vulnerable and can lead devices to fail during usage. Here an overview on the study on the physics of failures including that of latent effects induced by EOS and ESD is presented.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
M. K. Radhakrishnan and M. Natarajan "Physics of overstress-related failures in semiconductor devices", Proc. SPIE 1523, Conference on Physics and Technology of Semiconductor Devices and Integrated Circuits, (1 February 1992); https://doi.org/10.1117/12.57002
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KEYWORDS
Oxides

Physics

Semiconductors

Dielectric breakdown

Dielectrics

Lead

Metals

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