1 November 1991 High-density packaging and interconnect of massively parallel image processors
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Abstract
This paper presents conceptual designs for high density packaging of parallel processing systems. The systems fall into two categories: global memory systems where many processors are packaged into a stack, and distributed memory systems where a single processor and many memory chips are packaged into a stack. Thermal behavior and performance are discussed.
© (1991) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
John C. Carson, John C. Carson, Ronald Indin, Ronald Indin, } "High-density packaging and interconnect of massively parallel image processors", Proc. SPIE 1541, Infrared Sensors: Detectors, Electronics, and Signal Processing, (1 November 1991); doi: 10.1117/12.49338; https://doi.org/10.1117/12.49338
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