Paper
1 March 1992 Video rate morphological processor based on a redundant number representation
Wojciech Kuczborski, Yianni Attikiouzel, Gregory A. Crebbin
Author Affiliations +
Abstract
This paper presents a video rate morphological processor for automated visual inspection of printed circuit boards, integrated circuit masks, and other complex objects. Inspection algorithms are based on gray-scale mathematical morphology. Hardware complexity of the known methods of real-time implementation of gray-scale morphology--the umbra transform and the threshold decomposition--has prompted us to propose a novel technique which applied an arithmetic system without carrying propagation. After considering several arithmetic systems, a redundant number representation has been selected for implementation. Two options are analyzed here. The first is a pure signed digit number representation (SDNR) with the base of 4. The second option is a combination of the base-2 SDNR (to represent gray levels of images) and the conventional twos complement code (to represent gray levels of structuring elements). Operation principle of the morphological processor is based on the concept of the digit level systolic array. Individual processing units and small memory elements create a pipeline. The memory elements store current image windows (kernels). All operation primitives of processing units apply a unified direction of digit processing: most significant digit first (MSDF). The implementation technology is based on the field programmable gate arrays by Xilinx. This paper justified the rationality of a new approach to logic design, which is the decomposition of Boolean functions instead of Boolean minimization.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Wojciech Kuczborski, Yianni Attikiouzel, and Gregory A. Crebbin "Video rate morphological processor based on a redundant number representation", Proc. SPIE 1615, Machine Vision Architectures, Integration, and Applications, (1 March 1992); https://doi.org/10.1117/12.58793
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CITATIONS
Cited by 4 scholarly publications.
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KEYWORDS
Video processing

Video

Integrated circuits

Field programmable gate arrays

Inspection

Integrated circuit design

Logic

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