1 June 1992 Integrated circuit critical-dimension optimization through correlation of resist spin speed, substrate reflectance, and scanning electron microscope measurements
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Abstract
A procedure is described for predicting the optimum resist thickness to insure a reflectivity minimum at the wavelength of interest regardless of the underlying surface reflectivity. An experiment was performed using polysilicon on oxide wafers to demonstrate that uniform CDs could be patterned for a variety of reflectances.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Anne M. Kaiser, Robert M. Haney, "Integrated circuit critical-dimension optimization through correlation of resist spin speed, substrate reflectance, and scanning electron microscope measurements", Proc. SPIE 1673, Integrated Circuit Metrology, Inspection, and Process Control VI, (1 June 1992); doi: 10.1117/12.59802; https://doi.org/10.1117/12.59802
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