Translator Disclaimer
30 November 1992 Implementing the Viterbi algorithm on general-purpose parallel computers
Author Affiliations +
The Viterbi algorithm (VA) for decoding convolutionally encoded data has historically been implemented on special-purpose digital electronic hardware. For short/moderate (K equals 3 to 9) constraint length codes, a primary design goal is to maximize the decoded bit rate while minimizing circuit area. In recent years, a number of special-purpose architectures based upon shuffle-exchange networks, cube-connected cycles, ring-based networks, systolic arrays, or programmable processors have been designed for efficient implementation of the VA at these and longer constraint lengths. However, at the same time, the performance:cost ratio of high- end general-purpose computing machines has been improving dramatically. Recognizing the substantial investment in time and resources required to design and build an ASIC-based decoder for long (K equals 10 to 15) constraint length codes, the feasibility of implementation of the VA as a background process on a readily available general-purpose parallel processing machine deserves exploration. We consider the limitations and benefits of a Viterbi decoder for long constraint length codes implemented in software on a general-purpose parallel processing machine.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Michael D. Alston, Paul M. Chau, and Kar-Ming Cheung "Implementing the Viterbi algorithm on general-purpose parallel computers", Proc. SPIE 1770, Advanced Signal Processing Algorithms, Architectures, and Implementations III, (30 November 1992);


Optical Parallel Array Logic System
Proceedings of SPIE (February 08 1988)
Application Of Parallel Processing To Image Exploitation
Proceedings of SPIE (February 23 1989)
Interleaver design for high speed turbo decoders
Proceedings of SPIE (December 24 2003)
Concurrent Viterbi Algorithm With Trace-Back
Proceedings of SPIE (April 04 1986)
Digital Optical Parallel Computing
Proceedings of SPIE (March 27 1985)

Back to Top