Paper
30 November 1992 Scheduling parallel implementations of partitioned orthogonal transformations
Prashanth Kuchibhotla, Bhaskar D. Rao
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Abstract
Orthogonal matrix transformations form an important part of matrix-based signal processing applications. Systolic arrays for computing these algorithms have been developed and the size of these arrays usually depends directly on the size of the problem. For large matrix sizes, implementing large numbers of processors in hardware is not physically feasible. In this paper, we examine two popular orthogonal transformations, Givens rotations and householder transformations (HT), from the viewpoint of realizing a fixed-size parallel processor array that can handle large data matrices. An efficient scheduling procedure is used to compute the HT on a systolic type array, its performance is compared with that of an array designed for computing the Givens method. An important conclusion resulting from the comparison is that the performance of the HT array is superior to that for the Givens method when the matrices are larger compared to the array size.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Prashanth Kuchibhotla and Bhaskar D. Rao "Scheduling parallel implementations of partitioned orthogonal transformations", Proc. SPIE 1770, Advanced Signal Processing Algorithms, Architectures, and Implementations III, (30 November 1992); https://doi.org/10.1117/12.130922
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Cited by 1 scholarly publication.
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KEYWORDS
Silicon

Signal processing

Algorithm development

Matrices

Parallel computing

Array processing

Data storage

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