1 August 1992 Device modeling for high-speed three-dimensional CMOS/SOI integrated circuits
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Abstract
The physical effects in SOI MOSFETs such as the floating substrate regime in `thick' film, accumulation of excess holes in `thick' and `thin' film for the negative voltage at the back gate, the influence of the fixed surface charges at the front and back interface Si-SiO2 are investigated using two-dimensional numerical simulation. The dependence of the current- voltage characteristics of SOI MOSFET on the physical and technological parameters are analyzed. Some specific effects such as kink-effect, histeresis of drain characteristics, drain current overshoot, and their dependences on the switching speed are investigated. It is shown that thin film SOI devices with excluding floating substrate effects must be used for high speed VLSI. The switching characteristics of the different construction of the SOI/CMOS structures are simulated and compared. It is shown that thin film 3-D SOI/CMOS make a good choice for high speed VLSI.
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Konstantin O. Petrosjanc, Konstantin O. Petrosjanc, Maria V. Sicheva, Maria V. Sicheva, } "Device modeling for high-speed three-dimensional CMOS/SOI integrated circuits", Proc. SPIE 1783, International Conference of Microelectronics: Microelectronics '92, (1 August 1992); doi: 10.1117/12.130999; https://doi.org/10.1117/12.130999
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