Translator Disclaimer
1 November 1992 Digital signal processor accelerator board for image processing on VMEbus-based systems
Author Affiliations +
Proceedings Volume 1823, Machine Vision Applications, Architectures, and Systems Integration; (1992) https://doi.org/10.1117/12.132066
Event: Applications in Optical Science and Engineering, 1992, Boston, MA, United States
Abstract
The computational resources needed to implement image processing algorithms exceed the capability of most current VMEbus architectures. This is no reason to abandon these systems that are widely used, if we can complement them with the appropriate tools. In this paper we describe an architecture based on Digital Signal Processors (DSPs), VMEbus compatible, to accomplish the calculation intensive routines of the image processing algorithms.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Rui M. Boucho-Oliveira, Santiago Lorenzo, Luis L. Nozal, and Muzhir Shaban Mohammed "Digital signal processor accelerator board for image processing on VMEbus-based systems", Proc. SPIE 1823, Machine Vision Applications, Architectures, and Systems Integration, (1 November 1992); https://doi.org/10.1117/12.132066
PROCEEDINGS
6 PAGES


SHARE
Advertisement
Advertisement
RELATED CONTENT

A (Micro) Programmable Digital Image Processing System
Proceedings of SPIE (October 25 1983)
DDGIPS: a general image processing system in robot vision
Proceedings of SPIE (October 05 2000)
Colt: an experiment in wormhole run-time reconfiguration
Proceedings of SPIE (October 20 1996)
A novel parallel architecture for real-time image processing
Proceedings of SPIE (October 29 2009)
Fast multiply-accumulate architecture
Proceedings of SPIE (November 12 2000)

Back to Top