10 August 1979 Number Theoretic Processors, Optical And Electronic
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Proceedings Volume 0185, Optical Processing Systems; (1979) https://doi.org/10.1117/12.957470
Event: 1979 Huntsville Technical Symposium, 1979, Huntsville, United States
Abstract
An inner product processor is presented which is capable of performing 3.3 million inner products a second, where each vector consists of 100 elements each 20 bits wide. This is equivalent to more than 660 million 40 bit arithmetic operations a second. The latency of a particular calculation is 12.3 microseconds. The processor can be constructed entirely from 1024 by 6 bit ROMs with 300 ns cycle times and latchable inputs or outputs. Modular arithmetic is used internally; the input and output are binary. The specifications of the architecture are compatible with the stricter structural requirements needed by an optical implementation.
© (1979) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Alan Huang and Joseph W. Goodman "Number Theoretic Processors, Optical And Electronic", Proc. SPIE 0185, Optical Processing Systems, (10 August 1979); doi: 10.1117/12.957470; https://doi.org/10.1117/12.957470
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