12 July 1993 Electrolytic gate for quantum efficiency enhancement in thinned CCDs
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A transparent, semi-solid, electrolytic gate has been applied to the backside of thinned CCDs for quantum efficiency enhancement. The gate is applied by spreading a water solution of phosphoric acid and polyvinyl alcohol onto the silicon and drying it to form a thin plastic film. When a negative voltage of less than one volt with respect to substrate ground is applied to the gate, a QE pinned condition (100% internal quantum efficiency) is produced. An insulating layer is not needed with this gate (as it is with electronic conductors) since a threshold voltage of about 1.2 V is required before conduction into the silicon can occur. The mechanism of charging is believed to involve a pile-up of negative ions at the silicon-electrolyte interface which compensates for the positive oxide charge. Conduction into the silicon at low voltages is restricted by the oxidation potential of the negative ions in the electrolyte.
© (1993) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Michael A. Damento, Michael A. Damento, Mary Watson, Mary Watson, Gary R. Sims, Gary R. Sims, } "Electrolytic gate for quantum efficiency enhancement in thinned CCDs", Proc. SPIE 1900, Charge-Coupled Devices and Solid State Optical Sensors III, (12 July 1993); doi: 10.1117/12.148599; https://doi.org/10.1117/12.148599

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