Translator Disclaimer
12 July 1993 Large-pitch multiple-output 128x256-element area array
Author Affiliations +
A high speed imager capable of 1 gigacycle frame rate was developed with 80 micrometers X 80 micrometers pixels. A special multi-phase readout shift register and parallel to serial transfer structure are designed for high charge transfer efficiency operation across a large 80 micrometers pitch at high speed. A total of 64 outputs each designed to operate at 16 MHz are distributed around the array. In order to minimize power dissipation, a single output MOSFET operating in conjunction with an off-chip transimpedance amplifier was used. A photodiode, interline transfer pixel architecture was used with lateral antiblooming and exposure control capability.
© (1993) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
William D. Washkurak and Savvas G. Chamberlain "Large-pitch multiple-output 128x256-element area array", Proc. SPIE 1900, Charge-Coupled Devices and Solid State Optical Sensors III, (12 July 1993);


256(V) x 256(H) full frame area array image sensor with...
Proceedings of SPIE (August 11 1992)
Modeling of PSD based on Schottky-barrier junction
Proceedings of SPIE (January 16 2005)
6k-pixel 160-MHz CCD linescan sensor
Proceedings of SPIE (May 14 2000)
Design of low noise output amplifiers for P channel charge...
Proceedings of SPIE (February 15 2012)

Back to Top