15 September 1993 Advanced techniques for interlayer dielectric deposition and planarization
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Wafer fabrication technology is rapidly advancing toward three or four layers of metalization with geometry of 0.35 micrometers and smaller, with aspect ratios of 3:1, and a requirement that the interlayer dielectric be globally planarized. Electron cyclotron resonance chemical vapor deposition (ECR CVD) meets the prerequisites for the deposition of SiO2 in these stringent conditions. Gap fill has been demonstrated on structures of 3:1 aspect ratio and 0.25 mm gap width. The oxide profile resulting from the ECR deposition is also well suited to global planarization by chemical-mechanical polishing (CMP). This paper examines the interaction between these two processes in developing a two step deposition process that achieves the desired film properties as well as providing for the CMP requirements. In step one, the metalization structure is filled with a high sputter etch to deposition rate ratio and then, step two, the ratio is reduced to produce a high deposition rate for the `sacrificial' layer that is polished by CMP.
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Justin K. Wang, Justin K. Wang, Dean R. Denison, Dean R. Denison, "Advanced techniques for interlayer dielectric deposition and planarization", Proc. SPIE 2090, Multilevel Interconnection: Issues That Impact Competitiveness, (15 September 1993); doi: 10.1117/12.156535; https://doi.org/10.1117/12.156535


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