Paper
15 February 1994 Comparison of rapid thermal processing and furnace processing for quarter-micrometer CMOS
Badih El-Kareh, Ashwin Ghatalia, Mark D. Kellam, Philippe Maillot, Carlton M. Osburn, Xiaoqiang Zhang
Author Affiliations +
Abstract
A comparison was made between rapid-thermal processing and furnace processing with respect to gate oxidation, polysilicon sidewall oxidation, and junction activation anneal. NMOS and PMOS structures with N+ polysilicon gates, 6.5 nm gate oxide, and 70 nm source/drain junction depths were processed in parallel, using one-mask FET test structures to define MOSFETs with channel lengths down to 0.18 micrometers . Good NMOS device characteristics and low junction leakage were observed for all experimental combinations. Rapid-thermal and furnace oxidation exhibited similar gate-oxide breakdown characteristics.
© (1994) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Badih El-Kareh, Ashwin Ghatalia, Mark D. Kellam, Philippe Maillot, Carlton M. Osburn, and Xiaoqiang Zhang "Comparison of rapid thermal processing and furnace processing for quarter-micrometer CMOS", Proc. SPIE 2091, Microelectronic Processes, Sensors, and Controls, (15 February 1994); https://doi.org/10.1117/12.167352
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Cited by 2 scholarly publications.
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KEYWORDS
Oxides

Boron

Oxidation

Field effect transistors

Semiconducting wafers

Silicon

Phosphorus

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