22 October 1993 Real-time reprogrammable low-level image processing: edge detection and edge tracking accelerator
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Proceedings Volume 2094, Visual Communications and Image Processing '93; (1993) https://doi.org/10.1117/12.157912
Event: Visual Communications and Image Processing '93, 1993, Cambridge, MA, United States
Abstract
Currently, in image processing, segmentation algorithms comprise between real time video rate processing and accurate results. In this paper, we present an efficient and not recursive algorithm filter originated from Deriche filter. This algorithm is implemented in hardware by using FPGA technology. Thus, it permits video rate edge detection. In addition, the FPGA board is used as an edge tracking accelerator, it allows us to greatly reduce execution time by avoiding scanning the whole image. We also present the architecture of our vision system dedicated to build 3D scene every 200 ms.
© (1993) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
M. Meribout, M. Meribout, Kun Mean Hou, Kun Mean Hou, } "Real-time reprogrammable low-level image processing: edge detection and edge tracking accelerator", Proc. SPIE 2094, Visual Communications and Image Processing '93, (22 October 1993); doi: 10.1117/12.157912; https://doi.org/10.1117/12.157912
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