Multilayered Josephson junction logic and memory devices

Susanne Lomatch; Edward D. Rippert; John B. Ketterson

doi:10.1117/12.179165

29 June 1994 Multilayered Josephson junction logic and memory devices

Susanne Lomatch, Edward D. Rippert, John B. Ketterson

Proceedings Volume 2157, Superconducting Superlattices and Multilayers; (1994) https://doi.org/10.1117/12.179165
Event: OE/LASE '94, 1994, Los Angeles, CA, United States

Abstract

Flux quantum logic and memory circuits using superconducting Josephson tunnel junctions have high-speed switching times (approximately 1 ps), low power dissipation (< 1 (mu) W per circuit) and low levels of thermally induced electrical noise. Current designs of such circuits employ single trilayer junctions, which impose circuit size and logic threshold limitations. A new design component, the multilayered tunnel junction, consists of a vertically stacked array (a 1D superlattice) of Josephson tunnel junctions. The introduction of multilayered junctions into superconducting electronic circuitry offers a reduction in the current device size, fault tolerances, and new device applications. We present numerical simulations of simple circuits employing multilayered Josephson junctions as design components. Comparison with conventional single flux quantum circuitry is discussed. We also present preliminary measurements of multilayered Josephson junctions fabricated for use in flux quantum devices.

Citation Download Citation

Susanne Lomatch, Edward D. Rippert, and John B. Ketterson "Multilayered Josephson junction logic and memory devices", Proc. SPIE 2157, Superconducting Superlattices and Multilayers, (29 June 1994); https://doi.org/10.1117/12.179165

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